If a release note is not available for a specific IP core version, the IP core has no changes in that version. Information on the latest update releases is in the Intel Quartus Prime Design Suite Update Release Notes.
|Design Example for Stratix 10 SerialLite III Streaming:
|Added support for Stratix 10 devices.||—|
|Added a new parameter—Enable Transceiver Native PHY ADME.||—|
|New Example Design tab in the IP parameter editor.||Automatically generates both simulation and hardware design examples with the parameters you specify.|
|Renamed the parameter names in the IP parameter editor.||—|
|Support automatic generation of basic SignalTap® II Logic Analyzer files.||Simplifies generation of files for debugging.|
|Added a new parameter—Burst Gap.||—|
|For Arria 10 devices, the PMA width for Interlaken mode is changed to 64 bits.||IP Upgrade is compulsory if you are using
Arria 10 devices.
For Arria 10 devices, automatic upgrade will fail for IP core that uses Standard Clocking mode and was generated in a prior version of the Quartus II software. You must uncheck the Auto Upgrade option and click Upgrade in Editor to select a valid Transceiver Reference Clock frequency if the existing selection is invalid.
For Stratix V and Arria V GZ devices, these changes are optional. If you do not upgrade your IP core, it does not have these new features.
|For Arria 10 devices, the I/O PLL replaces the fractional PLL (fPLL) in generating the core clock and user clock signals.|
|Updated the bit function in the error_tx signal.|
|Updated the design example to support Arria 10 devices.|
|Updated sync_tx and sync_rx signal bus width to 8-bits.||–|
|Design example now supports simulation testbench based on user configurations in the Seriallite III Streaming IP core parameter editor.||–|
|The Quartus II software v14.1 requires that you specify a device if your IP core targets the Arria 10 device family. If you do not specify your target Arria 10 device, the IP Upgrade tool insists that your IP core requires upgrade, but does not clarify the reason.||You must ensure that you specify a device for your v14.0 Arria 10 Edition IP core variation and regenerate it in the Quartus II software v14.1.|
Added support for 17.4 Gbps data rate in variations that target an Arria 10 device. In the parameter editor, added support for the value of 17.4 Gbps for the Transceiver data rate per lane parameter in variations that target an Arria 10 device.