|Verified in the Quartus® Prime 15.1 software release.|
|Reduced Quartus II compilation warnings by 50%.||Reduces time required to vet compilation warnings.|
|Added support for 128-Bit Avalon-MM RX master.||If you add this Avalon-MM RX master to your design, you must regenerate your IP core.|
|Made the following changes for the V-Series PCIe with
Avalon-MM DMA Interface (previously called the Avalon-MM 256-bit Hard IP
for PCI Express IP Core).
The Descriptor Controller IP core included in the 14.0 release is significantly different from the one included in 13.1. Altera recommends that you update to v14.0. Altera no longer support v13.1.
|Added support for downstream burst read request for a payload of size up to 4 KBytes, if Enable burst capability for RXM BAR2 port is turned on in the Parameter Editor. Previous maximum downstream read request payload size was 512 bytes.||The IP core can receive and process a burst read request for a payload of any size supported by the PCI Express specification (up to 4 KBytes), if it receives such a burst read request on the PCI Express link.|