Discover more about flagship and technology-leading FPGA. Stratix® 10 devices are built on Intel’s 14 nm Tri-Gate transistor technology and leverage the HyperFlex™ core fabric architecture. Learn about the new and innovative system-in-package (SiP) solutions including embedded DRAM and insights into future SiP-based devices. Stratix 10 SoCs combine a 1.5 GHz quad-core 64 bit ARM® Cortex®-A53 architecture with a 1 GHz programmable fabric enabling custom functions, such as hardware accelerators, making Stratix 10 devices ideal for high-performance computing, data center acceleration, and for use in designs where performance is a key requirement. You will learn about and see live demos of this high-end FPGA family technology including 56 Gbps transceivers.

See the advantages offered by Arria® 10 FPGAs and SoCs, which require lower power than previous generation FPGAs and SoCs, and feature IEEE 754 hard floating-point digital signal processing (DSP) blocks, offering speeds up to 1.5 trillion floating point operations per second (TFLOPS). Arria 10 SoCs combine ARM® processors with a 20 nm FPGA fabric. Arria 10 SoCs enable higher performance and require lower power than previous generations due to these and other advancements. Markets that are reaping the benefits of Arria 10 device’s hard floating-point DSP blocks include military, wireline, and broadcast. You will learn about and see live demos of Arria 10-based solutions.

An overview of Intel PSG’s low-cost products and applications. See how the low-cost portfolios lower your total cost of ownership while differentiating your high-volume applications and increasing your system flexibility and reliability. We’ll highlight the key features of each low-cost product families and share ideas for designing state of the art industrial, automotive, consumer, and communication systems. You will see live demos and learn about new solutions in board management control, MIPI, battery management systems (BMS), virtual reality (VR), and many more. 

Learn more about the value of FPGAs with onboard processors. With the integration of application processors, modern FPGAs are really SoCs FPGAs. SoC FPGAs are essentially smart FPGAs, which can provide complimentary functionality with software applications running on the on-chip processors. In addition, smart FPGAs provide debug-and-performance-monitoring capabilities previously unavailable in traditional FPGAs. Join us to learn more about our SoC FPGAs that can help you in your system design innovation. 

Learn more about FPGA design tools and the revolutionary Quartus® Prime design software that enables you to design with Altera® FPGAs, SoCs, and CPLDs. The software enables you to design, synthesize, optimize, verify, and simulate your design. The Quartus Prime software is the ideal platform for you to take advantage of an FPGA’s multi-million logic elements, and the software also helps to dramatically increase design productivity. The Quartus II software and the new Quartus Prime software, with the additional Spectra-Q™ engine optimized for Arria 10 and future devices, help you get your design right faster. The Quartus Prime software is available in three editions based on your design requirements: Pro, Standard, and Lite Edition.

See firsthand the advantages of Open Computing Language (OpenCL™), which has become a game-changer, paving the way for easier programming of FPGAs. Software programmers not as familiar with other design tools can use OpenCL to create a software development environment to produce FPGA-accelerated systems significantly faster. OpenCL provides a unified programming language for CPUs, graphics processing units (GPUs), and FPGAs that allows code portability between each of the architectures, although not performance portability, to allow the system partitioned in the most efficient way. See the many benefits of what the FPGA can bring to system architectures and how easily higher performance can be achieved between FPGA families without changing your original code. Get up to speed on how Intel Programmable Solutions Group's SDK for OpenCL can help you rapidly develop acceleration solutions for a variety of applications and markets.

FPGAs offer incredible flexibility and capability, but face a growing challenge: how do you design the FPGA power supply to maximize system performance? In this session, learn how to get the most from your FPGA using Enpirion® Power Solutions from Altera, now part of Intel. These highly integrated PowerSoCs deliver the performance FPGAs need in the smallest, most efficient footprint while only requiring a few simple design steps – allowing you to meet tough system power requirements, physically fit all the functionality you need on your PCB, and save design time and cost.

Learn how FPGAs will help Internet of Things (IoT) systems designers reach their goals. The growth of the IoT will be driven by the explosion in the number of connected nodes, which are expected to grow from 16 billion in 2016 to over 30 billion by 2021. Much of these smart, connected nodes will be from Industrial end markets, such as factories, business, and utilities with the objective of increasing operational efficiency and reliability. This exponential growth of connectivity at the edge is translating into a paradigm shift in networking architectures and design with a shift towards more compute and acceleration at the network edge. The use of FPGAs for Industrial IoT solutions will allow for more cost effective, efficient, and secure autonomous communication that bridges cloud and data center operations with the "things" of the Industrial world.

Learn how to use FPGAs in designing your video applications, from standard definition (SD) to ultra-high definition (UHD) with support for higher frame rates and higher dynamic range. The Intel Programmable Solutions Group offers silicon and intellectual property (IP) that can enable the right combination of cost, support complete range of Altera FPGAs from MAX 10 to Stratix 10 devices, and performance to meet your video system requirements. Rapid design and derivative design creation is enabled through the Altera video framework of plug-and-play in-house, partner and customer-own IP functions. The in-house developed IP portfolio includes the Video and Image Processing Suite (now supporting up to UHD/4K scaling), multi-rate (up to 12G) serial digital interface (SDI), HDMI 2.0, DisplayPort (DP) 1.2, and HEVC Encoding. At the technology day, you will see the latest iteration of our UDX design series, showcasing 4K60 10 bit video processing on an Arria 10 Development Kit with HDMI 2.0 interfacing, all controlled from a simple tablet “app”. See a preview of UDX 10 here:     

As connected devices and machines continually become smarter and more ubiquitous, the Cloud infrastructure is struggling to adapt and scale to support these diverse workloads. Learn how Intel PSG's FPGAs, software development flows, IP, and solutions provide unique flexibility enabling Cloud providers to securely use homogeneous hardware to service today’s requirements while future-proofing for upcoming workloads as well. Intel PSG's FPGAs are already being used in multiple data centers to accelerate search algorithms, provide quality voice and speech recognition, and also provide advanced encryption for secure data transmission both within and between data centers.

The Stratix® 10 system-in-package (SiP) device architecture is exceptionally well provisioned for high-performance wireline applications, including 100G to 400G packet processing, traffic management, switching/bridging and aggregation, deep packet Inspection (DPI), and other related wireline applications. High-performance line-cards in the enterprise, service provider, and data center environments, as well as programmable and compute-intensive appliances in military, industrial, server, and compute/storage applications will all realize significant improvements in solution fitness and top-end performance given the Stratix 10  device high datapath throughput, enhanced logic and memory capacity, and outstanding serial connectivity. One new resource that has been recently added to the Stratix 10 SiP is the addition of two large-capacity embedded SRAMs, or eSRAMs.  Two multi-channel instances in the Stratix 10 SG210, each 40 megabits (Mb) in capacity are now integrated within the existing memory hierarchy as a separate fast-path/low-latency memory tightly coupled to the core logic fabric and are useful wherever high random-transaction rate (RTR) performance is vital, or alternatively to supplement/preserve general purpose M20K SRAMs.