Conference: November 13 - 18, 2016
Power Efficient Acceleration
Visit us at SuperComputing 2016, booth 2309, to see how you can use Open Computing Language (OpenCL™), a standard high-level programming language, to target Intel® FPGAs to get high-performance, power-efficient system acceleration. See how the Intel FPGA SDK for OpenCL*, the only conformant solution for FPGAs, can provide a software-friendly design environment that abstracts away the traditional FPGA development environment and brings the FPGA to the parallel programmer to help with power limitations in scalable high performance computing solutions.
See our in-booth demos:
- GZIP with OpenCL Host Channels - -The host channel option provides a low latency solution that is only available from Intel PSG. The flexibility and solutions provided by our IP portfolio is second to none in the industry. With the ability to support standalone FPGA and MCP off load, it is a powerful solution with capabilities to expand and reconfigure.
- Machine learning - Using multiple FPGAs to accelerate deep learning applications with low power and a single FPGA to accelerating training
- Neuromorphic Data Microscope - This demonstration compares the relative performance of the streaming analytics program WaterSlide executing on an IA server vs the same server augmented with an Intel/Altera Arria 10 based Neuromorphic Data Microscope.
Talk to our experts about your heterogeneous platform challenges, and get more details on how you can accelerate your software functions with power efficient Intel FPGAs.
We would also enjoy meeting with you one-on-one to discuss your strategy and requirements. To schedule a meeting with us, please contact your local sales representative.
OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.
* Product is based on a published Khronos Specification, and has passed the Khronos Conformance Testing Process. Current conformance status can be found at www.khronos.org/conformance.