The Arria® V FPGA RF Development Kit provides a complete design environment that includes all the hardware and software you need to develop RF adaptation algorithms and test them within a system environment. The development kit features the following boards:
Arria V GX FPGA Development Kit
- Two FPGAs for system level design
- Arria V GX—360KLE, F1517 package, 24X6G XCVRs, C6 speed grade
- Three I/O expansion slots—Two high-speed mezzanine cards (HSMCs) and one FMC
- 2 GB of SDRAM memory, 4.5 MB of QDR II memory, and 512 MB of flash memory
- Display port and SFP+ connections
- SMAs and the new Samtec Bullseye
- Amphenol® connectors for signal integrity (SI) and backplane measurements
- Ability to measure individual power rails on each chip
Texas Instruments Development Kits
- TSW30H84EVM, a complete RF transmit reference design, which includes the DAC34H84, the industry’s lowest-power 4-channel, 16-bit digital-to-analog converter (DAC) at 1.25 GSPS.
- TSW1266EVM, a digital pre-distortion feedback reference design.
- TSW1265EVM, a wideband dual-receiver reference design, which includes the ADS4249, the industry’s lowest-power dual-channel, 14-bit analog-to-digital converter (ADC).
- TSW3065EVM, a standalone local oscillator source designed with the TRF3765 integer or fractional phase-locked loop (PLL) and voltage-controlled oscillator (VCO).
- HSMC-ADC-Bridge and ArriaV-TI-Adapter to interface between TI and Intel® FPGA hardware.
- Buyer represents that it is a product developer, software developer or system integrator and acknowledges that this product is an evaluation kit that is not FCC authorized, is made available solely for evaluation and software development, and may not be resold.
- You can purchase optional HSMC connector interface-compatible daughtercards, adapters, or cables to use with your development kit.
Figure 1 shows a block diagram of the development kit. It consists of an Arria V GX Development Kit that is attached to three Texas Instruments DAC boards and an oscillator.
The kit uses Intel® FPGA's RF toolkit to develop RF adaptation algorithms such as a digital pre-distortion (DPD) block directly from Matlab to the actual hardware. As you can see in Figure 2, the RF algorithm is designed in Matlab and using the Advanced DSP Builder for Intel® FPGAs and Qsys software, it is automatically converted into register transfer level (RTL) code and downloaded with a testbench into the FPGA.
The FPGA then runs the test vectors through the Texas Instruments DAC into a scope or an actual power amplifier and reads back the resulting values through the Texas Instruments ADC. The resulting digital waveform is then uploaded into Matlab where the frequency spectrum can be reviewed and the designer can actually see in real time the effects of changes in the code to the resulting RF spectrum.
With this development kit, even if the designer is not an FPGA expert, they can still create different RF adaptation algorithms easily. This development kit allows you to achieve quicker development times and ultimately faster time to market.
Intel® FPGA (formerly Altera), Texas Instruments, and Arrow Electronics have partnered together to create an easy and simple way for RF design engineers to not only develop these algorithms but also test them in hardware and obtain the results in real time.