from Altera

Altera's 100G Development Kit, Stratix® IV GT Edition enables a thorough evaluation of 100G designs by allowing you to:

  • Support 10G/40G and 100G line interfaces through optical modules
  • Support applications requiring external memory interfaces, through 4x18 QDR II and 4x32 DDR3 memory banks
  • Use system side interfaces via two pairs of FCI AirMax connectors
  • Complete line side (optical modules) to system side (AirMax connector) datapath analysis
  • Evaluate transceiver performance up to 11.3 Gbps
  • Verify physical medium attachment (PMA) compliance to 10G/40G/100G Ethernet, Interlaken, CEI-6G/11G, PCI Express® (Gen1, Gen2, and Gen3), Serial RapidIO®, and other major standards
  • Validate interoperability between optical modules such as SFP, SFP+, QSFP, and CFP

Ordering Information

Table 1. Altera's 100G Development Kit, Stratix IV GT Edition

Ordering Code Price Ordering Information
DK-DEV-4S100G5N $19,995

In North America, call 1-888-800-0631 or contact your local distributor.
For International sales, contact your local distributor.

Notes:

Buyer represents that it is a product developer, software developer or system integrator and acknowledges that this product is an evaluation kit that is not FCC authorized, is made available solely for evaluation and software development, and may not be resold.

Development Kit Contents

The 100G Development Kit, Stratix IV GT Edition has the following features:

  • Stratix IV GT development board (see Figure 1)
    • Featured device: EP4S100G5F45I1N
    • EPM2210F324C3N, MAX® II 256-pin CPLD
  • Configuration status and set-up elements
    • Fast passive parallel (FPP) configuration
    • Embedded USB-BlasterTM download cable
  • Clocks
    • On-board programmable clock oscillators
    • SMA connectors for supplying an external differential clock to transceiver reference clock
  • General user input/output
    • DIP and push-button switches
    • LEDs
    • LCD
  • Memory devices
    • 1-Gb sync flash memory (primarily to store two FPGA configuarations - factory and user)
  • On-board memory
    • Four 2-Gb DDR3 SDRAM
    • Four 72-Mb QDR II SRAM
  • Components and interfaces
    • 10/100/1000 Ethernet PHY and RJ-45 jack
    • 36 transceiver channels
      • 1 channel for SFP+ interface
      • 1 channel for SFP+ with EDC interface
      • 4 channels for QSFP interface
      • 10 channels for CFP interface
      • 20 channels for Interlaken interface
  • Temperature measurement circuitry
    • Die temperature
    • Ambient temperature
  • Power
    • 14-V to 20-V DC input
    • 2.5-mm barrel jack for DC power input
    • On/off power slide switch
    • On-board power measurement circuitary
  • Quartus Prime design software license is not included as part of this kit

Table 2. Collateral for Stratix IV GT 100G Development Kit

Document Description Version
Stratix IV GT 100G Development Kit User Guide (PDF) Information about setting up the 100G Development Kit and using the included software. 10.0.0
100G Development Kit, Stratix IV GT Edition Reference Manual (PDF) Detailed information about board components and interfaces. 10.0.0
Kit installation Full installation of all files included in the development kit, including the reference manual, user guide, quick-start guide, BOM, layout, PCB, schematics, Board Update Portal example file, etc. 10.0.0
Kit installation

Full installation of all files included in the development kit, including the reference manual, user guide, quick-start guide, BOM, layout, PCB, schematics, Board Update Portal example file, etc. Contents are updated to Quartus II software version 11.1

11.1.0

For information on the 100G Development Kit, Stratix IV GT Edition, please visit www.altera.com