I/O Capabilities in MAX II CPLDs

Altera® MAX® II CPLDs offer I/O capabilities that optimize ease-of-use and system integration. Table 1 lists the I/O standards supported in MAX II CPLDs. Table 2 lists MAX II I/O features and benefits.

Table 1. MAX II CPLD I/O Standards

I/O Standard

Performance

3.3-V LVTTL/LVCMOS

300 MHz

2.5-V LVTTL/LVCMOS

220 MHz

1.8-V LVTTL/LVCMOS

200 MHz

1.5-V LVCMOS

150 MHz

3.3-V PCI (1)

66 MHz

Table 2. MAX II CPLD I/O Features and Benefits

Feature

Benefit

3.3-, 2.5-, 1.8- & 1.5-V LVTTL/LVCMOS

Enables broad application support and compatibility with other devices on board

MultiVolt™ I/O With Multiple I/O Banks

Up to four I/O banks seamlessly interface to other devices at 3.3-, 2.5-, 1.8-, and 1.5-V voltage levels

PCI Support (1)

Enables support for the 32-bit, 66-MHz PCI standard

Schmitt Triggers

Aids in noise tolerance on inputs with up to 300 mV of hysteresis on 3.3-V inputs and 160 mV of hysteresis on 2.5-V inputs

Programmable Drive Strength and Slew Rate

Allows you to control and improve signal integrity

Single Output Enable (OE) per I/O Pin

Numerous OEs allow you to use smaller devices, reducing cost

Hot-Socketing Support

Enables safe insertion or removal of device from powered systems

Fast I/O Connection

Enables fast tPD and tCO timing

Note:

  1. PCI support is available on EPM1270 and EPM2210 devices.

Fast I/O Connection

The MAX II CPLD I/O element (IOE) includes a dedicated connection path from an adjacent logic element (LE) associated with the I/O pin that results in fast tPD and tCO performance parameters. Quartus® II software automatically selects the dedicated path to speed-up I/O performance. Figure 1 illustrates the IOE in MAX II CPLDs.

Figure 1. MAX II CPLD I/O Element

MAX II CPLD I/O Banks

There are two I/O banks in the EPM240 and EPM570 devices and four I/O banks in the EPM1270 and EPM2210 devices. Each I/O bank has its own VCCIO pin and can be configured independently to support 1.5-, 1.8-, 2.5-, and 3.3-V interfaces. Each I/O bank can support an independent I/O standard. Figure 2 shows the I/O bank configuration in MAX II CPLDs.

Figure 2. MAX II CPLD I/O Bank Configuration