Whether your targeted market is communications, consumer, computing, industrial, or military, MAX® V CPLDs are the right choice if you need flexibility in control path applications (Table 1). Complete your PCB design early and lock down the device pin-out but still feel comfortable the Quartus® Prime design software will routinely fit your design into the MAX V device, even if over 85% full.

New features offered by MAX V CPLDs (vs. previous generation MAX CPLDs) include:

  • Architecture:
    • Logic element (LE) converted to RAM, digital phase-locked loop (PLL) IP, on-chip oscillator, 1.2-V LVCMOS, and LVDS output support
  • Cost:
    • Prices starting under $1
    • Lower total system cost due to the architecture that integrates more external functions that were previously implemented in discrete logic ASSPs
    • Lower total bill of materials (BOM) costs as the device requires as few as one power supply (Vcc-core)
  • Extended battery life with static power as low as 45 µW

These new features allow you to integrate multiple control path applications onto a single device. With its mix of low price, low power, and high performance features, Altera’s MAX V CPLDs deliver the market’s best value.

Table 1. Top Five CPLD Control Path Applications

Application Description
I/O expansion (PDF)Perform I/O decoding, efficiently increasing the available I/O capability of another standard device at a low cost.
Interface bridging (PDF)Translate bus protocols and voltages between incompatible devices at the lowest possible cost.
Power management control (PDF)Manage the power-up sequencing and monitoring of other devices on the board.
Configuration and initialization control (PDF)Control the configuration or initialization of other devices on the board.
Analog control (PDF)Digital control of analog standard devices (light, sound, or motion) via pulse-width modulator (PWM) without needing a digital-to-analog converter (DAC).