The SoC FPGA Embedded Development Suite (EDS) is a comprehensive tool suite for embedded software development on Intel SoC FPGA devices, including development tools, utility programs, run-time software, and application examples.
The Nios II development tool suite including software, device drivers, bare metal Hardware Abstraction Layer (HAL) library, network stack software and evaluation version of a real time operating system.
With the Intel FPGA SDK for Open Computing Language (OpenCL™), you develop FPGA designs in C using a high-level software flow. You can emulate your OpenCL C accelerator code on an x86-based host in seconds, get a detailed optimization report with specific algorithm pipeline dependency information, or prototype the accelerator kernel on a virtual FPGA fabric in minutes. After you have fine-tuned your kernel code, you can compile the design.