Developed in partnership with ARM, DS-5 Altera Edition (ARM DS-5 AE) is an end-to-end suite of tools for embedded C/C++ software development on any Altera SoC FPGA. It combines all features of the ARM DS-5 Professional Edition with powerful FPGA adaptive debugging capabilites, providing unmatched visibility and control of your SoC FPGA.
ARM DS-5 Altera Edition
Comprehensive Development Environment
|Eclipse-based IDE provides a great workbench with ARM's assembly editor and project management tools||Compile and build code for small footprint and high performance using ARM Compiler 5||Debug Bare-metal, Linux, and Android appliction code with low-cost USB Blaster II||Optimize and make your application more efficient with Streamline and Trace|
- Cross-trigger and debug across the CPU-FPGA boundary to find hidden bugs.
- Correlate events between the FPGA and CPU along with timestamps.
- Begin bare-metal debug with the low-cost USB Blaster II.
- Improve productivity by importing custom IP register defintions from Qsys and Quartus II software.
- Unleash the power of the Coresight STM Debug architecture.
- View timeline charts and heat maps for software executing on the target.
- Accurately profile the system by find CPU utilization per function non-intrusively.
- Debug multiple processor cores simultaneously and control them individually.
Application Performance Analysis
- With DS-5 AE's Streamline, visualize the performance bottlenecks in your embedded Linux or Android application.
- Setup and configure the ARM performance counters to dig deeper.
- Optimize your code for the best performance!
Note: The SoC EDS installs the DS-5 Community Edition by default.
|Application Performance Analysis|
|Streamline Performance Analysis||Limited Subset|
|Altera USB Blaster II|
|Linux Kernel Debug|
|Coresight STM Trace|
|ARM Compiler 5|
|OS Application Debug|
|Linux Application debug (GDB)|
|Android Application debug (ADB)|
|Activation Code||Free with SoC EDS Installation||