Highest Performance FPGA and SoC at 20 nm

Intel® Arria 10® FPGAs and SoCs deliver the highest performance at 20 nm offering a one speed-grade performance advantage over competing devices. Arria 10 FPGAs and SoCs are up to 40 percent lower power than previous generation FPGAs and SoCs and feature the industry’s only hard floating-point digital signal processing (DSP) blocks with speeds up to 1,500 giga floating-point operations per second (GFLOPS).

  • One speed grade faster than competing FPGAs and SoCs
  • The industry’s only midrange 25.78 Gbps support
  • Highest performance 2,400 Mbps DDR4 SDRAM memory interface
  • IEEE 754-compliant hard floating-point with 1,500 GFLOPS of DSP performance
  • 96 transceiver lanes deliver 3.3 Tbps of serial bandwidth

Up to 40% Lower Power than Previous-Generation FPGAs and SoCs

  • Programmable power technology–Reduce device power in lower performance circuits while also delivering highest performance where needed
  • Smart voltage ID–Operate devices to run optimum lower voltage without impacting performance
  • VCC power manager–Operate devices at multiple voltage levels for either higher performance or lower power
  • Low static power grades–Select devices with lower maximum static power

Industry’s Only 20 nm ARM-Based SoC

Save Board Space with Integration

  • 2X more density versus the previous generation midrange with over 1 million logic elements (LEs)
  • Hard intellectual property (IP) cores: DDR4 memory controllers and PCI Express* (PCIe*) 3.0 specification (Gen3)
  • Intel Enpirion® power solutions offer customers the smallest footprint, highest performance, lower system power, higher reliability and efficiency, and faster time-to-market to power Arria 10 FPGAs and SoCs

Increase Productivity and Decrease Time to Market with the Quartus Prime Software

  • Industry’s fastest compile time at 20 nm and most advanced design environment
  • Best-in-class IP cores including 100G Ethernet, 100G Interlaken, Hybrid Memory Cube and PCIe Gen3, with 2X performance and lower latency
  • Industry-leading compile times using this software release (an average of 2.5X faster than the nearest competitor’s software), enabling faster design iterations and faster timing closure
  • C-based design entry using the Intel® FPGA SDK for OpenCL™, offering a design environment that is easy to implement on FPGAs
  • System-level design environment with Qsys system integration tool
  • DSP Builder for Intel FPGAs–A model-based DSP environment within the MATLAB/Simulink environment

The Arria 10 FPGAs and SoCs are ideal for a broad array of applications such as wireless, wireline, military, broadcast, and other end markets.

Family Overview Table
Arria-10 Device Variations