Cyclone® 10 LP FPGAs continue the Cyclone series tradition of offering a combination of low power, high functionality, and at a low cost1
The logic and routing core fabric sea of gates is surrounded on each side by I/O elements, with a phase-locked loop (PLLs) in each corner. Embedded memory blocks (M9K) and 18 x 18 bit multipliers blocks are arranged in vertical columns.
The architecture also includes highly efficient interconnect and low-skew clock networks, providing connectivity between logic structures for clock and data signals.
Configuration error detection is supported in all Cyclone® 10 LP devices. User mode error detection is only supported in devices with 1.2-V core voltage. Dedicated circuitry built into Cyclone 10 LP devices consists of a CRC error detection feature that can optionally check for a single-event upset (SEU) continuously and automatically.
In critical applications used in the fields of avionics, telecommunications, system control, medical, and military applications, it is important to be able to:
- Confirm the accuracy of the configuration data stored in an FPGA device
- Alert the system to an occurrence of a configuration error
Nios® II processor, the world's most versatile, royalty free processor, according to Gartner Research, it is the most widely used soft processor in the FPGA industry. The Nios II processor delivers unprecedented flexibility for your cost-sensitive, real-time, safety-critical (DO-254), ASIC-optimized, and applications processing needs.
The Nios® II processor family consists of two configurable 32 bit Harvard architecture cores:
- Fast (/f core): Six-stage pipeline optimized for highest performance, optional memory management unit (MMU), or memory protection unit (MPU)
- Economy (/e core): Optimized for smallest size, and available at no cost (no license required)
Need to boost performance? No problem. Hardware acceleration is as easy as using an FPGA's programmable logic to offload and accelerate tasks that are typically implemented in application software, find out more here >>>
Table 1. Processor Performance (DMIPS* at fMAX)
|Nios II / e Economy||30 at 175 MHz*|
|Nios II / f Fast||190 at 165 MHz*|
* Dhrystones 2.1 benchmark (Intel Estimate)
Table 2. Processor Applications
|Application||Nios II Processor Core||Vendor||Description|
|Power and cost sensetive||Nios II economy core||Intel||With as low as 600 logic elements, the Nios II economy processor core is ideal for microcontroller applications. The Nios II economy processor core, software tools, and device drivers are offered free of charge.|
|Real Time||Nios II fast Core||Intel||
Absolutely deterministic, jitter free real-time performance with unique hardware real-time feature options
|Applications processing||Nios II fast core||Intel||With a simple configuration option, the Nios II fast processor core can use a memory management unit (MMU) to run embedded Linux. Both open source and commercially supported versions of Linux for Nios II processors are available|
|Safety Critical||Nios II SC core||HCELL||Certify your design for DO-254 compliance by using the Nios II Safety Critical procesor core along with the DO-254 compliance design services offered by HCELL|
|Lockstep Dual Core||fRSmartComp IP||Yogitech||The lockstep solution provides high diagnostic coverage, self-checking and advanced diagnostic features in full compliance with functional safety standards IEC 61508 and ISO 26262, while reducing the need for difficult to develop and performance sapping diagnostic software test libraries.|
Extend the board space, cost and time-to-market savings of Cyclone 10 LP FPGAs with Intel Enpirion Solutions
Intel's Enpirion® power solutions are highly efficient power management products featuring small size, leading-edge silicon and magnetics design, advanced packaging, and fully validated designs
The ultra compact and efficient PowerSoCs from the Enpirion series are ideal for meeting power requirements of Cyclone 10 LP FPGA systems. Enpirion PowerSoCs integrate nearly all the components needed for Cyclone 10 LP’s power rails, providing a family of fully validated, easy-to-use solutions with up to 96% efficiency–freeing designers to focus on their unique IP and FPGA designs and spend less time on power supply design.
Cyclone 10 LP FPGAs are offered in commercial, industrial, and automotive (AEC-Q100) temperature grades.
In addition, they will be supported in a future release of the functional safety pack, TUV certified to IEC 61508, reducing development time and time to market.
1 Compared to previous generation Cyclone FPGAs, cost comparisons are based on list price. Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks.