In addition to on-chip TriMatrix memory structures, Stratix® series FPGAs feature I/O structures designed to allow the direct connection of high-performance external memories. Over time, Stratix series FPGAs have progressed from DDR SDRAM operating at 400 Mbps to DDR3 SDRAM operating at 1600 Mbps. A full listing and comparison of the supported memory interface types for all Intel® high-end FPGAs is available on Intel's External Memory Solutions Center.
Table 1 lists all the relevant resources and downloads needed to assist in the interfacing of Stratix series FPGAs to external memory devices.
Table 1. Stratix Series External Memory Resources
|External Memory Handbook||External memory interfaces including DDR, DDR2, DDR3, QDR II/QDR II+, and RLDRAM II provide caching or data storage space in the majority of end systems featuring FPGAs.|
|IP MegaStoreTM Web Page||This web page links to different intellectual property (IP) cores provided by Altera and our partners. The web page also allows you to search for an IP core of your interest.|
|External Memory Design Examples||This page contains design examples for developing external memory solutions on Altera® products.|
|HSPICE Models||Web page providing board design-related resources for Altera devices.|
|IBIS Models||Web page listing of all the IBIS models for Altera devices.|
|Debug GUI User Guide (PDF)||User guide for the debug GUI.|
|Debug GUI||A .zip file that contains the debug GUI.|
|Timing Analyzer||Provides links and resources to learn more about the Timing Analyzer.|
|Board Design Guidelines Solution Center||Web page providing board design-related resources for Altera devices.|