Online Training

Course Title Description

Introduction to Remote System Upgrade in MAX 10 Devices

 

Learn about Remote System Upgrade (RSU) feature, unique to Intel® MAX® 10 devices that gives you the ability to remotely reconfigure a running device in the field to fix design problems or add functionality without a costly service call or downtime. Dual programming images provide a fail-safe update procedure, automatically falling back to a factory image in case of a problem.

 

This part of the training introduces the need and use cases for RSU and discusses the device resources and design elements required to create a design that makes use of the feature.

Remote System Upgrade in MAX 10 Devices : Design Flow & Demonstration

 

The second part of the training walks through the complete design flow for an RSU-supported design and includes a software and hardware demonstration of the flow.
Introduction to Analog to Digital Conversion in MAX 10 Devices This training introduces the Intel MAX 10 device family, discusses the typical types and uses of analog-to-digital convertors (ADCs), and presents the architecture of the ADC blocks found in Intel MAX 10 devices.
Integrating Analogue to Digital Conversion in MAX 10 Devices This training discusses how to use the  intellectual property (IP) Parameter Editor to parameterize the ADC and how to integrate the generated IP into a design.
Using the ADC Toolkit in MAX 10 Devices This part of the training discusses how to use the System Console-based ADC Toolkit to graphically analyze converted digital values captured by the ADC.
Using the MAX 10 User Flash Memory
Intel MAX 10 FPGAs feature internal User Flash Memory that can be used for general purpose non-volatile storage. This training discusses the properties of the User Flash memory as well as how to instantiate and perform operations on the User Flash Memory.
Using the MAX 10 User Flash Memory with the Nios II Processor Intel MAX 10 FPGAs feature internal User Flash Memory that can be used for general purpose non-volatile storage including software storage. This training discusses how to effectively use the User Flash Memory with the Nios II processor in various modes.
Using the Nios II Processor: hardware Development Lean about the Nios II embedded soft processor, the basics of the Avalon® Standard and the Platform Designer (formerly Qsys) high performance network -on-a-programmable-chip architecture.
Using the Nios II Processor: Software Development Learn about the Nios II Software Build Tools for Eclipse, develop software for FPGAs, and use Nios II Development kits for prototyping. Utilize the associated Nios II processor and Platform Designer (formerly Qsys) "Hello World" lab on the low-cost MAX 10 Development Kit to exercise the concepts discussed in the slides and associated tool demonstrations included in the class.

Getting Started

Title Description
How to Begin a Simple FPGA Design This training is for engineers who have never designed an FPGA before. You will learn about the basic benefits of designing with FPGAs and how to create a simple FPGA design using the Quartus® II software  v15.0. If you’ve purchased a Intel® MAX® 10 FPGA Development Kit, you can transfer the programming file created during the tutorial to the development board
Become an FPGA Designer in 4 Hours
This course gives you basic skills to design with Intel FPGAs. The course uses lecture, demonstrations, and labs that is completed in 4 hours. Learn architectural features of Intel FPGA devices and how the Quartus® II software works.
Using the Nios II Processor: Hardware Development Learn the basics of the Avalon Standard Interface and the Platform Designer's (formerly Qsys) high performance network-on-a-programmable-chip architecture. Learn to use the Platform Designer (formerly Qsys) to develop and configure customized Nios II processor-based hardware systems. Utilize the associated Nios II processor and Platform Designer (formerly Qsys) “Hello World” lab on the MAX 10 Development Kit to exercise the concepts discussed in the slides and associated tool demonstrations included in this class.
Using the Nios II Processor: Software Development
Learn about the Nios II Software Build Tools for Eclipse v14.1. Learn to develop software for FPGAs and use Nios II Development Kits for prototyping. Utilize the associated Nios II processor and Platform Designer (formerly Qsys) “Hello World” lab on the MAX 10 Development Kit to exercise the concepts discussed in the slides and associated tool demonstrations included in this class.