Delivering an unprecendented 2X performance, up to 70% lower power, up to 5.5 million LEs, and the highest level of system integration, Intel® Stratix® 10 devices are uniquely positioned to address next-generation, high-performance systems in the most demanding applications including communications, data center acceleration, high performance computing, radar processing, ASIC prototyping, and many more.

Check out a sample of the advanced applications enabled by Stratix 10 FPGAs and SoCs below.  

ASIC Prototyping and Emulation

Highest Monolithic FPGA Fabric Capacity

Highest density for higher productivity

  • 5.5 million LE monolithic core fabric

Superior, flexible debug

  • Register and state readback

I/O bandwidth

  • 1,600+ I/Os

Integrated test vector generation/acceleration

  • Quad-core 64 bit ARM* Cortex*-A53 hard processor system

Unique to Stratix 10 Devices

  • Higher productivity by reducing design partitioning complexity using monolithic FPGA fabric 
  • Highest I/O bandwidth, over 1,600 I/Os: every I/O is configurable as single-ended or differential, input or output 
  • Integrated quad-core ARM Cortex-A53 processor provides test vector flexibility and streamlined readback control

Network Intrusion Detection and Prevention

400G Throughput Bump-in-the-Wire

Line rate analysis of data traffic

  • From 1G to 400G
  • Implement Intrusion Prevention Systems (IPS) and Intrusion Detection Systems (IDS) on streaming traffic

Bump-in-the-wire

  • Security performed on traffic flows prior to entering network
  • Continuous network monitoring or tagging of live traffic

Unique to Stratix 10 Devices

  • fMAX over 900 MHz allows monitoring of all supported protocols at line rates 
  • ARM* Cortex*-A53 processor enables direct interfacing with existing IT software 
  • Partial reconfiguration and OpenCL support allow for easy rules updates

Data Center Acceleration

Cognitive Computing

High-performance accelerators

  • Up to 10 TFLOPS
  • Highest fabric performance
  • Highest memory bandwidth

Algorithm flexibility    

  • OpenCL™ support
  • Software front end for security and flow control with integrated ARM* Cortex*-A53 hard processor system

Unique to Stratix 10 Devices

  • HyperFlex FPGA Architecture delivers up to 1 GHz performance, enabling breakthroughs in computational throughput 
  • Hardened single-precision floating-point DSP block, compliant with IEEE 754 standard, delivers GPU-class floating performance at a fraction of the power
  •  Secure cloud solutions using the security features

400G-500G Hybrid Multiplexer

Single-Chip Solution

High-throughput optical transport

  • 400G to 500G transport
  • Hybrid ODUk and packet switching
  • 4-5 x 80 channel ODUk multiplexing

Flexible OTN IP portfolio

  • SoftSilicon* IP

Unique to Stratix 10 Devices

  • Heterogeneous 3D System-in-Package (SiP) integration of transciever tiles delivers 30G backplane support with a path to 56G data rates
  • HyperFlex FPGA Architecture enables 2X performance resulting in signifcant IP size reductios

400-1200G OTN Data Transport and Data Center Interconnect

1.2 Terabits in a Single Chip

High-throughput optical transport

  • 8-12 x 100G transponder or muxponder
  • 800 to 1200G data transport
    • 10/25/40/100/400 GE tributaires

Flexible OTN IP portfolio

  • SoftSilicon* IP

Unique to Stratix 10 Devices

  • Full design performance over 700 MHz enables higher throughput per FPGA or using a smaller device 
  • High-capacity monolithic FPGA fabric enables a single-chip solution for optimal system design 
  • Heterogeneous 3D System-in-Package (SiP) integration of transciever tiles delivers 30G backplane support with a path to 56G data rates

Bridging and Aggregation

Enabling New Network Infrastructure

High throughput with power efficiency

  • 400G traffic manager with 600 million packet per second throughput
  • Less than 1 watt per 10 Gbps

Flexible, high-performance interconnect

  • Adaptable, scalable, and optimized IP portolio including 400G Ethernet
  • Integrated processor for system monitoring and management

Unique to Stratix 10 Devices

  • fmax over 700 MHz using the Intel HyperFlex™ FPGA Architecture enabling 400G Ethernet 
  • 512 bit wide data path running at 2X performance enables half-size IP compared to conventional architectures

Radar

Digitizing the Radar Front-End

Highest performance per watt

  • Up to 10 TFLOPS single precision floating point performance
  • Up to 80 GFLOPS/Watt

High-throughput front end

  • High number of simultaneous beams with high bandwidth
  • Beam former IP

Unique to Stratix 10 Devices

  • Up to 10 TFLOPS of IEEE 754 compliant single precision floating point performance delivers GPU class performance at a fraction of the power 
  • Core fMAX up to 1 GHz enabling high throughput beam processing