Implement your high-density logic design with a Stratix® II FPGA and get high performance and great signal integrity in the most efficient device possible. Other key Stratix II FPGA features include:

Manufactured on the TSMC low-k dielectric process technology with up to 180K equivalent logic elements (LEs) and 9 Mbits of embedded memory, Stratix II FPGAs are the highest performance and highest density 90-nm FPGAs available. The Stratix II FPGA features Altera's redundancy technology, which dramatically increases yields and lowers device costs. The Stratix II FPGA is also optimized for total device power.

For designs in production, Altera is delivering the Stratix II FPGA family in high volume today. For your next generation system designs, Altera offers the Stratix III high-performance FPGA family.

Implemented on a 65-nm process, the Stratix III FPGA family contains three device variants—one optimized for high density logic, one optimized for DSP and memory, and one with on-chip high-speed serial transceivers. Every Stratix III FPGA employs Altera's unique Programmable Power Technology and selectable core voltage, enabling Stratix III devices to be optimized for the lowest possible power consumption on a design by design basis.

Highest Performance and Productivity Levels

Reduce your design iteration times by up to 70 percent and substantially improve your productivity compared to traditional high-density FPGA design flows by using Quartus® II software, which includes the industry's first incremental compilation feature.

Quartus II software is a comprehensive suite of synthesis, optimization, and verification tools in a single, unified design environment that enables the highest levels of productivity and the fastest path to design completion for high-density FPGA designs.

Transceivers With Integrity

The Stratix II GX FPGA with transceivers is built using the Stratix II FPGA fabric. A Stratix II GX FPGA integrates up to 20 serializer/deserializer (SERDES)-based transceivers on a single device. Through careful selection of data-rates and a new clocking structure, a Stratix II GX FPGA can support a broad spectrum of protocols while dissipating significantly less power than competing solutions.

Best-In-Class Features

A Stratix II FPGA (shown in Figure 1) improves on the Stratix FPGA features that set new standards in FPGAs. New device capabilities—such as the new logic structure and design security technology—round out the industry’s most advanced FPGA feature set.

The Stratix® II GX FPGA provides a strong solution for the growing number of applications and protocols requiring multi-gigabit serial I/O. The Stratix II GX FPGA transceiver architecture provides robust noise immunity and excellent jitter performance across an operating range of 600 Mbps to 6.375 Gbps, while maintaining the lowest power consumption. Stratix II GX FPGAs, available in production today, are built using the industry’s fastest and highest-density Stratix II FPGA fabric and integrate up to 20 serializer/deserializer (SERDES)-based transceivers.

Best-In-Class Signal Integrity

Stratix II GX FPGA transceiver architecture successfully operates at data rates up to 6.375 Gbps on transmission lines to 50" (1.25 m) in length, on boards and backplanes fabricated on standard FR-4 material, and up to 30 m of PCIe cable at 2.5 Gbps. To achieve this, the transceivers include a number of features to ensure signal integrity at these higher data rates, while maintaining low power. These include:

Complete Protocol Solution

The Stratix II GX FPGA is part of a complete solution to key protocols used in many of today’s high-speed serial applications. Support is provided for PCI Express, CEI-6G, serial digital interface (SDI), Gigabit Ethernet, Serial RapidIO® (SRIO), XAUI, SerialLite II, Fibre Channel, and SONET standards. The complete solution includes:

Innovative Logic Structure

The Stratix II GX FPGA is built on the innovative adaptive logic module (ALM) logic structure found in the Stratix II FPGA, using TSMC's 90-nm, low-k dielectric process technology, optimized to maximize performance and control power leakage. A Stratix II GX FPGA can provide up to 20 high-speed serial transceivers and up to 130 K equivalent logic elements (LEs), 6.7 Mbits of embedded memory with up to 252 (18-bit x 18-bit) multipliers for efficient implementation of high-performance filters and other digital signal processing (DSP) functions. Key features of the Stratix II GX FPGA architecture include:

Design With Confidence Today

All Stratix II GX devices are shipping in production volume to customers. The following resources are now available from Altera and ecosystem partners to get you started designing with an Altera® Stratix II GX FPGA: