End Markets

Broadcast

The challenge facing designers in the broadcast market is to provide cost-effective solutions with the highest levels of audio and video quality. In studio applications, Stratix III L devices provide the logic-rich resources ideal for many A/V functions, while Stratix III E devices provide the ultimate in DSP and memory resources needed for the video effects processing challenge of uncompressed 1080P high-definition (HD) video.

Head-end equipment also requires the extensive DSP and memory resources of Stratix III E devices for video processing applications such as H.264 compression.

For more information on how Altera FPGAs can be used in various broadcast market applications, refer to Altera's Broadcast web page.

See how Stratix III FPGAs support broadcast applications.

Wireless

The wireless end market is evolving at a rapid pace toward next-generation mobile broadband access systems such as WiMAX and 3GPP long term evolution (LTE). Use of advanced signal processing techniques such as orthogonal frequency-division multiple access (OFDMA) and multiple-input multiple-output (MIMO) significantly increase the processing requirements in a basestation.

Stratix III E devices provide the perfect mix of on-chip memory and high-performance signal processing capability required to achieve the lowest cost-per-channel designs in next-generation basestations. The low power and integration capabilities of Stratix III E devices also make them a good choice for pico basestations and remote radio head applications, where lack of forced air-flow places stringent requirements on allowable power consumption levels.

For more information on how Altera® FPGAs can be used in various wireless applications, refer to Altera's Wireless web page.

See how Stratix III FPGAs support wireless applications.

Military

The demands of military applications can be very complex. Software defined radios (SDRs) must implement multiple waveforms for various battlefield communication systems, whereas digital receivers (such as radars and sensors) are becoming smaller and lighter so that they can be deployed in the battlefield. These military applications demand heavy signal processing, design security, and soft-error immunity. To meet these needs, today’s FPGAs must provide the highest performance at the lowest power consumption, as well as high density and robust I/O capabilities.

Through Programmable Power Technology and selectable core voltage, Stratix III E FPGAs offer the best performance-to-power ratio and highest density for memory-rich, DSP-heavy applications like SDR infrastructure, digital receiver processing, and missile guidance systems. The new enhanced DSP blocks optimize finite impulse response (FIR), floating point, and complex multiplication implementations up to 550 MHz. In addition, sophisticated soft-error detection and prevention, as well as both volatile and non-volatile design security are enhanced features in the Stratix III architecture.

For more information on how Altera FPGAs can be used in various military market applications, refer to Altera's Military web page.

See how Stratix III FPGAs support military and aerospace applications.

Test & Measurement

With the rapidly increasing complexity in high-performance systems being built for tomorrow’s applications, the ability to provide solutions that can test these products at full performance in a timely manner is imperative. Testing such solutions typically requires manipulating a large amount of data and monitoring of many nodes in real-time, with low crosstalk and low interference between signals.

Stratix III L devices provide the highest I/O-to-logic ratio with I/O pins that support multiple standards, while both the Stratix III E and Stratix III L family variants support the use of high-speed memory interfaces to store the large amounts of data being processed.

For more information on how Altera FPGAs can be used in various military market applications, refer to Altera's Test and Measurement web page.

See how Stratix III FPGAs support test and measurement applications.

Medical

With the push toward high-resolution images and real-time diagnosis, data transmission and image processing requirements in medical diagnostic equipment applications are becoming more and more sophisticated.

Stratix III E devices provide the high DSP performance needed to collect, process, and display the data along with the ability to transmit and receive data using high-speed differential interfaces.

For more information on how Altera FPGAs can be used in various military market applications, refer to Altera's Medical web page.

See how Stratix III FPGAs support medical applications.

Applications

DSP

Without compromising the performance required for compute-intensive applications, Stratix III DSP blocks provide the lowest power, lowest cost, and smallest footprint programmable processing solution available.

Stratix III E devices provide a DSP-rich and memory-rich, highly parallel alternative to digital signal processors. For applications where a separate digital signal processor is necessary, Stratix III FPGAs make an ideal coprocessor to do the "heavy lifting" of algorithmic processing.

Altera also provides the tools necessary to implement your DSP algorithm through the use of DSP Builder and SOPC Builder utilities, both part of theQuartus® II performance and productivity enhancing design software that supports Stratix III FPGAs.

 

Memory Interfaces

The complete set of Altera memory interface design solutions address today's high-speed memory interface challenges, such as memory controller design,I/O design, and board-level signal integrity issues.

Altera's Stratix III solutions include advanced FPGA architectures, customizable MegaCore® functionsQuartus II design software, reference designs, and simulation models, accompanied by a rich set of technical documentation.

 

ASIC Prototyping

Stratix III FPGAs are the world's highest density and fastest performingFPGAs, making Stratix III L devices an ideal choice for use in ASIC prototyping platforms when you are performing verification of your next ASIC or ASSP design.