Altera's 40 nm solutions enable new levels of system-on-a-chip (SoC) integration and allow you to innovate products without compromise. Stratix® IV FPGAs offer unprecedented system bandwidth with 11.3 Gbps transceivers and fast DDR3 memory interfaces on a fabric that delivers the highest density, the highest performance, and the lowest power.
Combined with Quartus® Prime productivity tools and technology solutions, Altera’s 40 nm portfolio meets the requirements of high-end digital systems in many end markets, such as wireless, wireline, military, and broadcast, and application areas such as digital signal processing (DSP), embedded processing, memory interfaces, and ASIC prototyping.
The Stratix IV (GT, GX, and E) FPGAs enables highly integrated SoC solutions, meeting stringent power budgets and significantly lowering total cost of ownership for wireless basestation OEMs. These highly integrated single chip implementations allow flexible and scalable architectures for baseband PHY, RF/IF processing, and high-speed CPRI/OBSAI serial links supporting multi-sector multiple-input multiple-output (MIMO) WiMAX/long term evolution (LTE) configurations.
For more information on how you can use Altera® FPGAs in various wireless applications, refer to Altera's Wireless web page.
See how Stratix IV FPGAs support wireless applications.
The evolution of high bandwidth services such as Internet protocol television (IPTV) is forcing network architectures to scale in performance and manageability. Stratix IV GT and GX FPGAs will be a key piece in next-generation 40 Gbps and 100 Gbps architectures by enabling high-speed packet processing, traffic management, security, and encapsulation solutions.
For more information on how you can use Altera FPGAs in various wireline applications, refer to Altera's Wireline web page.
See how Stratix IV FPGAs support wireline applications.
High-resolution networked sensors and electronic warfare systems require state-of-the-art technology for connection bandwidth and analog-to-digital resolution. Altera’s Stratix IV (GT, GX, and E) FPGAs meet these requirements with fast DSP, reliable throughput to multi-gigabit open systems data buses, and easy-to-document workflow.
For more information on how you can use Altera FPGAs in various military applications, refer to Altera's Military web page.
See how Stratix IV FPGAs support military applications.
The challenge in the broadcast market is to provide cost-effective solutions with the highest levels of audio and video quality. In studio applications, Stratix IV FPGAs provide the ultimate in DSP and memory resources needed for the video effects processing challenge of uncompressed 1080p high-definition (HD) video and serial interfaces for SD/HD and 3G-SDI. Head-end equipment also requires the extensive DSP and memory resources of Stratix IV FPGAs for video processing applications such as H.264 compression.
For more information on how you can use Altera FPGAs in various broadcast applications, refer to Altera's Broadcast web page.
Without compromising the performance required for compute-intensive applications, Stratix IV DSP blocks provide the lowest power, lowest cost, and smallest footprint programmable processing solution available. Both Stratix IV GX, Stratix IV GT, and Stratix IV E family variants provide a DSP- and memory-rich, highly parallel alternative to digital signal processors. Stratix IV GX FPGAs add additional transceivers for high-speed connectivity and support for protocols such as the Serial RapidIO® standard and CPRI/OBSAI.
Altera also provides the tools necessary to implement your DSP algorithm through the use of DSP Builder and SOPC Builder tools, both part of the Quartus II software performance- and productivity-enhancing design software that supports Stratix IV FPGAs. With the 8.0 release of the DSP Builder tool, Altera added a number of new Simulink blocksets (the Advanced Blockset library) that vastly improve your productivity, especially for the synthesis of multichannel designs.
Nios® II embedded processors version extend the embedded software capabilities of Altera's 40 nm FPGAs, allowing you to add a memory management or memory protection unit to your Nios II designs for operating system support and software protection. With Nios II embedded processors, you can add dozens of 300 MIPS processors in a single high-density device. You can accelerate time-critical software subroutines automatically by converting ANSI C code into hardware accelerators with the Nios II C-to-Hardware (C2H) acceleration compiler. You can add hardware accelerators to boost system performance and/or reduce system power consumption. See what’s new in the latest release.
Faster, more robust, simpler, and lower power—Altera’s external memory solutions support high-speed external memory interfaces including DDR, DDR2, DDR3 SDRAM, RLDRAM II, QDR II, and QDR II+ SRAM on up to 24 modular I/O banks. The smart interface module is a hardened I/O module with programmable input and output delays for lane de-skew, dynamically calibrated on-chip termination (OCT), and controllable drive strength and slew rate. It offers the unique ability to swap between parallel or serial termination on-the-fly between read and write operations and saves 1.2 W power for a typical design.
Stratix IV FPGAs are the world's biggest and fastest 40 nm FPGAs, making them the ideal choice for use in ASIC prototyping platforms when you are performing verification of your next ASIC or ASSP design.