Stratix V Device Family Variations

Variant Description
Stratix V GT FPGA Optimized for applications with 28.05 Gbps transceivers requiring ultra-high bandwidth and performance, such as 40G/100G/400G applications
Stratix V GX FPGA Optimized for high-performance, high-bandwidth applications with integrated transceivers supporting backplane, chip-to-chip, and chip-to-module operation at up to 14.1 Gbps
Stratix V GS FPGA Optimized for high-performance, variable-precision digital signal processing (DSP) applications with integrated transceivers supporting backplane, chip-to-chip, and chip-to-module operation at up to 14.1 Gbps
Stratix V E FPGA Optimized for ASIC prototyping with 952K logic elements on the highest performance logic fabric

Stratix V Architecture

Stratix V Feature Overview

Feature Stratix V E
FPGA
Stratix V GS
FPGA
Stratix V GX
FPGA
Stratix V GT
FPGA
High-performance adaptive logic modules (ALMs) 359,200 262,400 359,200 234,720
Variable-precision DSP blocks (18x18) 704 3,926 798 512
M20K memory blocks 2,640 2,567 2,660 2,560
External memory interface        
Partial reconfiguration        
Fractional phase-locked loop (PLL)        
Design security        
Single event upset (SEU) mitigation        
PCI Express® Gen3, Gen2, Gen1 hardened IP block(s) - Up to 2 Up to 4 1
Embedded hard IP blocks -      
Transceivers (1) - 14.1 Gbps / 48 14.1 Gbps / 66 28.05 Gbps / 4
12.5 Gbps / 32
Notes:
  1. Data rate / number of transceiver channels.

The Stratix® V FPGA family includes the following device variants:

  • Stratix V GX FPGAs with transceivers: Integrate up to 66 full-duplex, 14.1 Gbps transceivers and up to 6 x72 bit DIMM DDR3 memory interfaces supporting 933 MHz
  • Stratix V GS FPGAs with enhanced digital signal processing (DSP) capabilities and transceivers: Integrate up to 3,926 18x18, high-performance, variable-precision multipliers, 48 full-duplex, 14.1 Gbps transceivers, and up to 6 x72 bit DIMM DDR3 memory interfaces supporting 933 MHz
  • Stratix V GT FPGAs with transceivers: Integrate four 28 Gbps transceivers and 32 full-duplex, 12.5 Gbps transceivers with up to 4 x72 bit DIMM DDR3 memory interfaces supporting 933 MHz
  • Stratix V E FPGAs: Up to 950K logic elements (LEs), 52-megabit (Mb) RAM, 704 18x18 high-performance, variable-precision multipliers, and 840 I/Os

Tables 1 through 3 provide an overview of the Stratix V GX, GS, GT, and E device family variants. Please note that, at this time, all specifications are subject to change. Table 4 provides the temperature grades for all variants.

Table 1. Stratix V GX FPGA Overview

Features 5SGXA3 5SGXA4 5SGXA5 5SGXA7 5SGXA9 5SGXAB 5SGXB5 5SGXB6 5SGXB9 5SGXBB
Equivalent LEs 340,000 420,000 490,000 622,000 840,000 952,000 490,000 597,000 840,000 952,000
Adaptive logic modules (ALMs) 128,300 158,500 185,000 234,720 317,000 359,200 185,000 225,400 317,000 359,200
Registers 513,200 634,000 740,000 938,880 1,268,000 1,436,800 740,000 901,600 1,268,000 1,436,800
14.1-Gbps transceivers 12, 24, or 36 24 or 36 24, 36,
or 48
24, 36,
or 48
36 or 48 36 or 48 66 66 66 66
M20K memory blocks 957 1,900 2,304 2,560 2,640 2,640 2,100 2,660 2,640 2,640
M20K memory (Mb) 19 37 45 50 52 52 41 52 52 52
Memory logic array blocks (Mb) 3.92 4.84 5.65 7.16 9.67 10.96 5.65 6.88 9.67 10.96
18x18 multipliers 512 512 512 512 704 704 798 798 704 704
27x27 DSP blocks 256 256 256 256 352 352 399 399 352 352
PCI Express®
hardened intellectual property (IP) block(s)
1 or 2 1 or 2 1,2, or 4 1,2, or 4 1,2, or 4 1,2, or 4 1 or 4 1 or 4 1 or 4 1 or 4
Availability All devices are in full production

Please refer to the Altera Product Catalog to view the Stratix FPGA family package plan with vertical migration support and ordering code information.

Table 2. Stratix V GS FPGA Overview

Features 5SGSD3 5SGSD4 5SGSD5 5SGSD6 5SGSD8
Equivalent LEs236,000360,000457,000583,000695,000
ALMs89,000135,840172,600220,000262,400
Registers356,000543,360690,400880,0001,049,600
14.1-Gbps transceivers2436364848
M20K memory blocks6889572,0142,3202,567
M20K memory (Mb)1319394550
Memory logic array blocks (Mb)2.724.155.276.718.01
18x18 multipliers1,2002,0883,1803,5503,926
27x27 DSP blocks6001,0441,5901,7751,963
PCI Express
hardened IP block(s)
1111 or 21 or 2
AvailabilityAll devices are in full production

Please refer to the Altera Product Catalog to view the Stratix FPGA family package plan with vertical migration support and ordering code information.

Table 4. Stratix V FPGA Temperature Support

Device Package Commercial Speed Grade Support Industrial Speed Grade Support
5SGXA3 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXA4 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXA5 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXA7 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXA9 All Packages C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXAB All Packages C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXB5 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXB6 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGXB9 All Packages

C2, C2L, C3, C4

I2, I2L, I3, I3L, I4

5SGXBB All Packages

C2, C2L, C3, C4

I2, I2L, I3, I3L, I4

5SGSD3 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGSD4 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGSD5 All Packages C1, C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGSD6 All Packages C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGSD8 All Packages C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SGTC5 All Packages C1, C2 I2, I3
5SGTC7 All Packages C1, C2 I2, I3
5SEE9 All Packages C2, C2L, C3, C4 I2, I2L, I3, I3L, I4
5SEEB All Packages C2, C2L, C3, C4 I2, I2L, I3, I3L, I4

Table 3. Stratix V GT and E FPGA Overview

Features 5SGTC5 5SGTC7 5SEE9 5SEEB
Equivalent LEs425,000622,000840,000952,000
ALMs160,400234,720317,000359,200
Registers641,600938,8801,268,0001,436,800
28.05-Gbps/12.5-Gbps transceivers4 / 324 / 32N/AN/A
M20K memory blocks2,3042,5602,6402,640
M20K memory (Mb)45505252
Memory logic array blocks (Mb)4.907.169.6710.96
18x18 multipliers512512704704
27x27 DSP blocks256256352352
PCI Express
hardened IP block(s)
11N/AN/A
AvailabilityAvailable nowFull production

Please refer to the Altera Product Catalog to view the Stratix FPGA family package plan with vertical migration support and ordering code information.