CIC MegaCore Function



Figure 1. Three-Stage Decimating CIC Filter Used in DDC



Figure 2. Three-Stage Interpolating Filter Used in DUC

Cascaded integrator comb (CIC) filters (also known as Hogenauer filters) are computationally efficient for extracting baseband signals from narrow-band sources using decimation and for constructing narrow-band signals from processed baseband signals using interpolation.

Therefore, CIC allows for an economical and multiplier-free hardware implementation of a filter, and is widely used in sample rate conversion designs such as digital downconverters (DDC) and digital upconverters (DUC). See Figures 1 and 2.

The Intel® FPGA CIC MegaCore® function provides an easy-to-use MegaWizard™ interface for parameterization and hardware generation of a fully parameterizable CIC function, which allows you to set the following parameters:

  • Selectable decimation or interpolation filter types
  • Configurable number of stages (1 to 12)
  • Interpolation and decimation rate change factors (1 to 32,000)
  • Two differential delay options (1 or 2)
  • Configurable input data width (1 to 32 bits)
  • Configurable output data width (1 to full resolution data width)
  • Selectable output rounding modes (truncation, convergent rounding, rounding up, or saturation)
  • Single clock domain
  • Up to 1,024 channels

The CIC function supports the following additional features:

  • Intellectual property (IP) functionalsimulation models for use in intel FPGA supported VHDL and Verilog HDL simulators
  • Support for OpenCore Plus evaluation
  • DSP Builder ready
  • Hogenauer pruning support
  • Data ports compatible with the Avalon® streaming interface

Typical expected performance and utilization figures for this core are provided in the CIC MegaCore Function User Guide (PDF).

For technical support on this IP core, please visit mySupport. You may also search for related topics on this function in the Knowledge Center or refer to the following documentation: