QDRII SRAM Controller Intel® FPGA IP Function

  • Support for QDRII and QDRII+ SRAMs
    • Support for burst of two and four memory type
    • Support for 8 bit, 18 bit, and 36 bit QDRII SRAM interfaces
  • Flexible and robust design
    • Support for two-times and four-times data width on the local side (four-times for burst of four only)
    • Automatic concatenation of consecutive reads and writes (narrow local bus width mode only)
    • Intellectual property (IP) functional simulation models for use in VHDL and Verilog HDL simulators supported by Intel
    • Easy-to-use IP Toolbench interface and example design
    • Support for Intel FPGA IP Evaluation Mode

Typical expected performance and utilization figures for this Intel FPGA IP function are provided in the QDRII SRAM Controller Intel FPGA IP Function User Guide (PDF).

For technical support on this Intel FPGA IP function, please visit the mySupport online issue tracking system. You may also search for related topics on this function in the Knowledge Database.