Intel® FPGA IP for RLDRAM II Controller

Included in the IP Base Suite—FREE with Intel® Quartus® Prime Standard and Pro Edition design software

  • Support for industry-standard RLDRAM II components
    • Common I/O (CIO) and separate I/O (SIO) device support
  • Flexible and robust design
    • Non-multiplexed addressing
    • Datapath generation
    • Data strobe signal (DQS) and non-DQS capture modes
    • Intellectual property (IP) functional simulation models for use in Intel® FPGA-supported VHDL and Verilog HDL simulators
    • Easy-to-use IP Toolbench interface and automatic constraint generation

Typical expected performance and utilization figures for this Intel FPGA IP are provided in the RLDRAM II Controller MegaCore Function User Guide (PDF).

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