The Pactron Vigor QPI Development system with Sandy Bridge and Stratix V is the first to offer the user both Caching Agent and Home Agent configurations running at lane speeds of 6.4 GT/s. This solution is ideal for designers of low-latency, signal-processing, packet processing and embedded applications, such as high-frequency trading and big data that need higher computation performance-per-watt than traditional CPU configurations can deliver.
The Caching Agent allows access to system memory which is kept coherent with on FPGA cache. This configuration, as shown in Figure 1, allows CPU offloading with the FPGA AFU (accelerator function unit) or user logic IP. This is advantageous for accelerators that work as algorithm co-processor and for low latency applications such as financial services.
Figure 1. Caching Agent Configuration
The Home Agent allows the external memory connected to the FPGA to appear as system memory. This configuration, as shown in Figure 2, allows users to prototype new memory controller technologies like filtering, search, hashing, and in-memory database accelerators.
Figure 2. Home Agent Configuration