Intel® Arria® 10 SoC FPGAs are ARM* processor-based and inherit the strength of the ARM ecosystem. Intel, our ecosystem partners, and the Intel SoC FPGA user community provide a wide range of options to meet your SoC FPGA development needs.
You can obtain Linux* and open-source products for Intel SoC FPGAs on RocketBoards.org. This site provides a development environment and collaboration for embedded developers using SoC FPGAs. For information about the Golden System Reference Design that comes pre-installed on the Intel SoC FPGA boards, search rocketboards.org for “GSRD”.
There are a number of options for operating systems, development tools, intellectual property (IP) cores, and professional services. Many are provided by ecosystem partners.
The Arria 10 SoC includes a sophisticated high-performance multicore ARM Cortex*-A9 processor. This processor can be used for a wide range of functions from very simple bare-metal applications running on one of the available cores to high-bandwidth, low-latency , real-time operations. For a simple single-core application with minimal real-time constraints, bare-metal application can be build using the Hardware Libraries (HWLIBs). However to take full advantage of the capabilities of the device it is highly recommended to use an operating system. The chosen operating system can be a simple real-time kernel running on a single-core or a full-featured operating system such as Linux, or one of a number of multicore capable real-time operating systems.
In addition to open-source Linux, there are a number of commercial operating systems available for the Arria 10 SoC.
Why Use an Operating System?
Operating systems are highly optimized to take full advantage of the processor capabilities and limitations. It has been found that real-time operating systems designed for Symmetric Multi-Processing (SMP) will generally provide similar or better performance and lower latency than bare-metal applications (no operating system). Commercial operating systems also typically include specialized embedded development tools, middleware, technical support, and are thoroughly tested in the operating system partner's test framework.
For professional quality development tools including JTAG debuggers and instruction trace functions consider the following options:
Development Tools Ecosystem for Arria 10 SoC
|Lauterbach||TRACE32||Lauterbach TRACE32 is family of modular microprocessor development tools that include debug, trace, and instruction-set simulators that support the Nios® II processor and the dual-core ARM Cortex-A9 MPCore* processor-based SoC.|
|MathWorks||Simulink Embedded Coder||Use Simulink and Embedded Coder from MathWorks to generate C/C++ code for Intel® Cyclone® V SoCs. When used in combination with Intel SoC FPGA support from HDL Coder, this solution can be utilized in a hardware or software workflow spanning simulation, prototyping, verification, and implementation on SoC FPGAs.||Coming Soon|
|iSystem||iC5000||iSYSTEM’s embedded on-chip debug or analyzer, real-time test and measurement tool platform. It is based on programmable hardware where support for different microcontroller families and features is controlled via software. Major benefit is one time investment into hardware while supported debug and advanced test feature set can be extended at any time via software.||Coming Soon|
|SEGGER||J-Link||J-Link debug probes support up to 3 MBps download speed to RAM and high speed flashloaders, as well as the ability to set an unlimited number of breakpoints in flash memory of microcontroller units (MCUs).||Coming Soon|
|Wind River||Workbench||Software development tools for VxWorks on the dual-core ARM Cortex-A9 MPCore* processor in Cyclone V SoC, Arria V SoC, and Arria 10 SoC.|
|Mentor Embedded||Sourcery CodeBench||GNU toolchain support for the dual-core ARM Cortex-A9 MPCore processor-based SoC Virtual Target.|
|Altium||Tasking VX-toolset||Optimizing C compiler, assembler, linker, and locator.||Coming Soon|
Intel SoC FPGAs are supported by a wide range of Intel FPGA and third-party soft Intellectual Property (IP) cores. These blocks can be instantiated in the FPGA portion of the SoC device. Some examples of key SoC soft IP cores are shown below.
IP Cores Ecosystem For Arria 10 SoC
Nios II Soft Processor
The Nios® II processor, the world's most versatile processor, according to Gartner Research, is the most widely used soft processor in the FPGA industry. The Nios II processor delivers unprecedented flexibility for your cost-sensitive, real-time, safety-critical (DO-254), ASIC-optimized, and applications processing needs. The Nios II processor supports all Intel SoC and FPGA families.
Design Services Network
Design Service Network (DSN) members offer an extensive portfolio of design services, IP, and products that can help customers meet challenging product development needs, lower risk, and accelerate time to market. They have expertise designing with Intel FPGAs, tools, and IP combined with application experience to offer customers design services ranging from selecting the right FPGA to full turnkey or systems-level design.
Intel SoC FPGA-based boards are available from Intel and ecosystem partners. Boards can be standalone or system on module (SoM) configuration.
Standalone boards are sometimes included as part of a development kit. A development kit typically includes software and hardware. Intel SoC FPGA development kits include the board and all associated cables, documentation, and software development tools, such as SoC Embedded Development Suite (SoC EDS) and ARM* Development Studio 5 for Intel SoC FPGAs.
A number of SoC FPGA-based boards are available.
System on Module
Production-ready System on Modules (SoM) for embedded applications are based on Arria 10 SoC FPGAs integrating dual-core ARM Cortex-A9 processors, high performance I/O, programmable logic, DDR4 memory, and BSPs on an optimized small-footprint module.
Take advantage of a complete ecosystem today, using these off-the-shelf modules installed onto a custom or commercial carrier base board specific to your system application and significantly reduce your design time and risk.