SoC FPGA Tools and Software

Browse through the development tools available for building software and creating FPGA designs for Intel® SoC FPGAs.

ARM* Development Studio 5 for Intel® SoC FPGAs

Every SoC FPGA-based embedded system design is unique due to the customized logic programmed into the FPGA. To perform system debugging effectively, the ARM* Development Studio 5 for Intel® SoC FPGAs toolkit dynamically adapts to your configuration. It unifies all software debugging information from the CPU and FPGA domains and presents them in an organized fashion within the standard DS-5 user interface. Intel and ARM developed the toolkit to give you an unprecedented level of debugging visibility and control that delivers substantial productivity gains.

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SoC FPGA Embedded Development Suite

The Intel SoC FPGA Embedded Development Suite (SoC EDS) is a comprehensive tool suite for embedded software development on Intel SoC devices. It contains development tools, utility programs, run-time software, and application examples to expedite firmware and application software for SoC FPGA embedded systems. With the SoC EDS, you get all the tools you need to work more productively, improve your software quality, and ultimately get to market faster.

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Quartus Prime Software

The Intel Quartus® Prime software provides everything you need to design with Intel SoC FPGAs. It is a complete development package that comes with a user-friendly GUI and technology to help you bring your ideas into reality. The Quartus Prime environment includes a host of tools and features to enhance productivity, many of which are the first in the industry.

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Intel FPGA SDK for OpenCL

The Intel FPGA SDK for Open Computing Language (OpenCL™) allows a user to abstract away the traditional hardware FPGA development flow for a much faster and higher level software development flow. Emulate your OpenCL C accelerator code on an x86-based host in seconds, get a detailed optimization report with specific algorithm pipeline dependency information, or prototype the accelerator kernel on a virtual FPGA fabric in minutes, pushing the longer compile time to the end when you are pleased with your kernel code results.

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Virtual Platform for Industry Leading SoC FPGAs

Intel, in collaboration with Mentor Graphics, provides embedded software developers access to virtual platforms. These platforms support Intel's entire SoC FPGA portfolio, including the Intel Arria® 10 SoC, the industry’s only 20 nm SoC FPGA, and the third-generation 14 nm Intel Stratix® 10 SoCs with a 64 bit quad-core ARM Cortex*-A53 processor. The virtual platforms, built with Mentor Graphics* Vista tools, are pre-built, fully functional simulations models of the SoC FGPA’s ARM processor subsystems. 

What Is a Virtual Platform?

The SoC FPGA virtual platforms comprise an instruction set simulator CPU model plus peripheral device models, delivered as a stand-alone binary executable. You download, install, and run the executable with a pre-built Linux image on a host PC. Additionally, you can link a model of custom functions in the FPGA fabric to the virtual platform for system-level simulation. The virtual platform supports both bare-metal and operating system environments, and allows software execution and debug on multi-core configurations of Intel's SoC FPGAs. You can use any GDB-compatible debug environment, including ARM* Development Studio 5 for Intel® SoC FPGAs toolkit, for comprehensive debugging of bare metal, Linux and other OS applications.

Basing the SoC FPGA virtual platform on the Mentor Graphics Vista tool suite provides users a seamless migration to Mentor Graphics’ Vista Virtual Prototyping solutions. The Vista Virtual Prototyping tool suite provides additional insight into hardware/software interaction or non-intrusive profiling and analysis. It also extends the SoC FPGA virtual platform, including timing-approximate or timing-accurate CPU models.  

When Do I Use a Virtual Platform?

Software developers can use the Stratix 10 SoC virtual platform to start embedded software development and debug for the integrated quad-core ARM Cortex-A53 processor subsystem well before first silicon availability. Additionally, SoC FPGA virtual platforms simplify embedded software development and reduce the need for expensive hardware by enabling large development teams to perform application development and software regression testing in a virtual environment modeling an Intel SoC FPGA.

Next Steps

For more information on the Intel SoC FPGA virtual platform, refer to the following links:


To download the latest documentation for the Arria 10 SoC Virtual Platform, refer to the following link:


To download the latest documentation for the Stratix 10 SoC Virtual Platform, refer to the following link:

For support questions regarding the SoC FPGA virtual platform go to the Forums page on

For any other questions, please contact your sales representative.

Intel Enables Linux on SoC FPGAs and the Nios II Processor

Intel contributes to the Linux community to enable our SoC FPGA and Nios® II customers via the community portal We provide a kernel, U-boot, and a meta-Intel layer for Angstrom and the Yocto Project. Intel contributes to the open source community to enable the Linux kernel to run on its SoC FPGA and Nios II architectures. Contributions include improvements to the general kernel as well as new SoC FPGA and Nios II specific functions, such as the FPGA manager framework. By nature, these improvements benefit everyone in the Linux community.

Industry-Leading Linux Support

Intel keeps up with the Linux community by upgrading to the latest stable kernel on Additionally, Intel supports a modern release strategy by updating public git trees every two weeks on


Intel's approach to Linux for SoC FPGAs and the Nios II processor is centered on upstreaming fixes and improvements of the SoC FPGA and Nios II code primarily to and  Consequently, Intel assembled a Linux team with upstreaming as a key strategy.


In addition to providing the latest stable kernel for the SoC FPGA architecture, Intel also supports U-Boot, LTSI kernel with and without PREEMPT_RT, and a meta-Intel layer. This code runs (and was tested on) the Yocto-compatible, Angstrom distribution. You can obtain the code via the public code repositories on, which is a “one-stop-shop” for Linux developers working on Intel's SoC FPGAs. code repositories include:

  • Latest stable kernel
  • LTSI kernel v4.1
  • LTSI kernel v4.1 with PREEMPT_RT
  • U-Boot v2013.01
  • Meta-Intel layer for Angstrom Distribution v2014.06

Intel's SoC FPGA Linux Ongoing Innovation

Intel contributes to the Linux kernel, Specifically, Intel innovates by augmenting the Linux kernel with new features, such as an FPGA manager framework for programming and reconfiguring the FPGA. Furthermore, Intel is enhancing the kernel to better handle memory map reconfiguration via dynamic device trees.