Digital set-top boxes (DSTBs) receive and decode television broadcasts from satellite, cable, and/or terrestrial sources. Integrated digital televisions (DTVs) have built-in digital tuners, demodulators, and source decoders, so they do not require digital set-top boxes that receive digital broadcasts.

Traditional DSTBs are designed to receive standard definition (SD) Moving Pictures Experts Group-2 (MPEG-2) video format broadcasts. However, many of today’s DSTBs are high-definition (HD)-ready. In fact, selected cable television service providers, networks, and local terrestrial TV stations are concurrently transmitting both SD and HD content. Over time, MPEG-4 will displace the MPEG-2 format for both SD and HD.

When MPEG-4 becomes the standard compression standard, systems implementing reprogrammable logic devices (such as Altera® FPGAs) will be able to seamlessly upgrade without having to scrap inventory items or make new hardware. Using FPGAs, manufacturers can design a STB that can decode MPEG-2 video format, and then later upgrade that same STB for MPEG-4 by simply reprogramming the FPGA in-system.

High-end DSTBs usually offer personal video recorder (PVR) and/or an HD DVD recorder for Blu-ray functions. Microcontrollers in DSTBs or integrated DTVs can perform a number of functions for these systems, including control panel management and on-screen display (OSD).

Many current DSTBs can be classified either as free to air (FTA) or pay TV versions. A pay TV example would be DSTBs designed for DirecTV or Dish Network (in the USA), which require conditional access to decode the audio and video.

DSTB manufacturers typically design the PCBs for both low-end and high-end DSTB systems and require a flexible solution for implementing their various designs. Figure 1 shows a typical Altera programmable logic device (PLD) solution for DSTBs and depicts one of the wide range of applications that are possible with an FPGA-based solution.

Figure 1. Example of an Altera PLD Solution for DSTBs and DTVs


  1. AGC = automatic gain control
  2. ADC = analog-to-digital converter
  3. FEC = forward error correction
  4. SC = smart card

Some examples of Altera or third-party intellectual property (IP) used in DSTBs and DTVs include:

  • Ethernet
  • Embdedded Solutions
  • USB
  • Motion Estimation
  • Color Space Conversion
  • DCT & iDCT
  • I2C
  • IDE Controller

Low-Cost Programmable Solutions for DSTBs and DTVs

Altera’s low-cost Cyclone® III, MAX® II, and MAX 3000A devices provide cost-effective programmable solutions for audio and video processing, making these devices ideal for digital video applications. The Cyclone FPGA series and the MAX CPLD series also contain system functions that complement available ASSPs, such as on-screen display (OSD) and timing display.

Cyclone® III FPGAs are built on a 65-nm low power (LP) process technology. The Cyclone III family is comprised of eight devices ranging from 5K to 120K logic elements (LEs) and up to 534 user I/O pins. Cyclone III FPGAs offer up to 4 Mbits of embedded memory, 288 embedded 18x18 multipliers, dedicated external memory interface circuitry, and phase-locked loops (PLLs) making them ideal for high-end video and image processing functions.

The Altera Nios® II family of embedded processors can be implemented in Cyclone series devices for high-performance, cost-efficient processing solutions. The Cyclone series and its solutions offer digital video designers unparalleled capability at extremely affordable pricing.

Altera’s MAX CPLD series is the industry’s most successful and widely used CPLDs. MAX 3000A devices are optimized for high-volume, cost-sensitive applications. Altera’s latest CPLDs, MAX II devices, are designed for low-cost and low-power applications. The non-volatile and low-cost features of the MAX 3000A and MAX II devices make them ideal for DVD player/recorder functions such as address decoding, system timing, and system bug fixes.