Producing reliable, more efficient, and less costly solar or photovoltaic (PV) systems is an important step in making solar energy more competitive. This poses challenges in designing the solar inverter architecture to meet the following demands:

  • Reliability and long service life to supply distributed renewable energy sources with central power generation for growing power needs.
  • Increased efficiency and lower unit costs using advanced control algorithms and power topologies like 3-level insulated gate bipolar transistor (IGBT) and wideband gap SiC-FETs.
  • Local grid code compliance, which includes power quality monitoring and control.

In the past, traditional PV inverter architectures consisted of a DSP for MPPT and DC-DC control, an FPGA for the DC-AC control and perhaps a separate MCU to handle system communications. These three separate system components can be aggregated into a MAX® 10 FPGACyclone® V FPGA or SoC by integrating the DSP control loop, DC-DC and DC-AC conversion and communications all on a single device. This new optimized architecture shown below optimizes system cost and reduces the number of components increasing reliability as well as reducing feature size.

PV Inverter Architecture with MAX10 FPGA, Cyclone V FPGA or SoC


Next-generation SoC inverter: Use a Cyclone V SoC with an embedded ARM® processor to integrate the DSP control loop and MCU software for fewer components and failure points, letting you develop a smaller, lighter and lower cost inverter

MPPT Reference Design

The maximum power point tracking (MPPT) reference design is available as an DSP Builder for Intel® FPGAs model file and provides an example of implementing MPPT algorithm for solar inverters:

  • Implementation example of FPGA performance with MPPT based on perturb-and-observe (P&O) method
  • Reusable design to scale to multichannel MPPT designs
  • End-to-end latency of 36 clock cycles, or .36 µs on Cyclone® V FPGA running at 100 MHz
  • DSP Builder tool flow for designing MPPT algorithms inside a solar inverter

To request this reference design, contact your local sales representative.

MPPT Perturb-and-Observe Reference Design in MATLAB Simulink/FPGA Tool Flow

Three-Level IGBT PV Inverter Reference Design

This insulated gate bipolar transistor (IGBT) reference design, available as VHDL source codes from Intel and EBV Elektronik, is ideal for three-phase, three-level IGBT inverters, and addresses:

  • Complex control algorithm on Cyclone FPGA and SoC devices
  • Reduced current ripple
  • Reduced electromagnetic interference (EMI)
  • Improved active filtering to reduce passive components, saving on inverter size, weight, and cost

To request this reference design, contact your local sales representative.

FalconEye 3-Level Kit with 3-level IGBT Power Board