Creating Wireless Designs

Intel® PSG and its partners offer a wide range of tools to help you resolve common wireless design challenges and significantly shorten your design cycle. To learn more, browse through our available FPGA development kits, daughter cards, reference designs, and IP cores.

Intel and its third-party intellectual property (IP) partners offer a large selection of off-the-shelf IP cores optimized for Intel® devices.

The table below lists the available licensed and unlicensed IP solutions for this end market. Click on each product name for specifications and evaluation information. Note that licensed and unlicensed IP come bundled with Intel® Quartus®Prime design software. To learn about additional IP from Intel and its partners, go to the Intellectual Property & Reference Designs page.

IP Cores

1 / 10 Gbps Ethernet MegaCore

10 Gbps Ethernet MAC MegaCore Function

NCO MegaCore Function

FFT MegaCore Function

JESD204B MegaCore

CPRI IP MegaCore

CIC MegaCore function

FIR Compiler II / FIR Compiler MegaCore Function

High Speed Reed Solomon MegaCore

Bose, Chaudhuri, and Hocquenghem (BCH) MegaCore

Turbo MegaCore

Low Density Parity Check (LDPC) MegaCore

Reed Solomon Encoder / Decoder II

Viterbi Compiler

Intel and its partners develop and deliver reference designs that provide efficient solutions for common system design problems.

The table below lists the available reference designs for wireless end markets. Click on each product name for specifications and evaluation information. To learn about additional reference designs from Intel and its partners, go to the All Reference Designs page.

Reference Designs

10 Gbps Ethernet Reference Design

3GPP UMTS Turbo Decoder Reference Design

PCI Express Reference Designs and Application Notes

QR Matrix Decomposition Reference Design

Implementing OFDM Modulation and Demodulation

3GPP LTE Turbo Decoder and 3GPP LTE Turbo Encoder Reference Design

 

The following reference designs can be found in latest version of DSP Builder Advanced (DSPBA)

Crest Factor Reduction (CFR)

Blind CFR*

E-Band Transceiver with synthesizable channel model

Digital Up-converter / Digital Down-converter (DUC/DDC)*

LTE Transmitter

*Will be available in DSPBA version 16.0

 

Other DSP Builder Examples / References

DSP Builder

CIC Interpolation Filter with Multi-Channel Data Support

Coefficients Reload Design Example for FIR Compiler - Verilog

Designing Digital Down Conversion Systems

Multi-channel Farrow Filter Design Example

Accelerated FIR with Built-In Direct Memory Access Example

Polyphase Modulation With Aliasing for Data Up-Conversion

Reconfigurable Decimation Filter Design Example Using DSP Builder Advanced Blockset

Using CIC Decimation Filter with Multi-channel Support

Variable Integer Rate Decimation Filter Design Example

Development Kits

Intel® FPGA development kits provide a complete, high-quality design environment that simplifies the design process and reduces time to market. Development kits include software, reference designs, cables, and programming hardware.

You can purchase products online from our eStore, from a distributor or sales representative, or, for partner kits, contact the partner directly. For more information, go to the main development kits page.

Product Name 

Technology Connector   Price 
Provider  

XTS Card

Interface HSMC $140 Terasic

GPIO-HSTC Card

Interface HSMC $55 Terasic

Universal Wireless Communications Toolkit

- HSMC $2,800 Lime Microsystems

QuadPHY 10/100/1000

- HSMC $395 Nine Ways R&D

TwoPHY 10/100

- HSMC $145 Nine Ways R&D

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