Wireline Webcasts and Videos

Balancing Power, Performance, and Cost with Arria V FPGAs

23 minutes

View this webcast to learn how Arria® V FPGAs have been optimized to improve power consumption and save cost without sacrificing performance. You’ll learn about the new 28-nm core architecture and how the use of the 28-nm Low-Power (28LP) process and other unique innovations significantly improves your power consumption and saves you cost.

Martin Won, Senior Member of Technical Staff

Achieving 25-Gbps Transceiver Performance on 28-nm FPGAs

9 minutes

Watch this 9-minute video to see a live demo of our 28-nm transceiver technology running a pseudo-random bit pattern at 25-Gbps. You'll also view TX and RX eye diagrams across at 10GBASE-KR backplane running at 10 Gbps, and learn more about Stratix V FPGAs.

Allan Davidson, Product Marketing Manager