Power consumption is more and more critical in many applications, such as battery-powered equipments, very low power applications and other fields like automotive, military, etc … Thus, choosing and using a very low power external memory such as a PSRAM (Pseudo-Static RAM) memory can be a very interesting solution (less than 40 mA during burst read operations @ 104 MHz) ALSE has developed a very compact and efficient controller that can be easily integrated in any FPGA project.
- High-Performance Controller supporting Burst Mode for Read/Write transfers
- Support of different PSRAM memory standards (e.g : Micron CellularRam 1.0/1.5/2.0)
- Support of PSRAM memory with Multiplexed address/data bus
- Easy integration using Altera Qsys, or manually.
- Provided with sophisticated SDC Timing Constraints, Hardware Tester Reference Designs, etc…
IP Quality Metrics
|Year IP was first released||2016|
|Latest version of Quartus supported||15.1|
|Altera Customer Use|
|IP has been successfully implemented in production with at least one customer||Y|
Customer deliverables include the following:
|Any additional customer deliverables provided with IP||QIP File for Easy Integration|
|Parameterization GUI allowing end user to configure IP||Y|
|IP core is enabled for OpenCore Plus Support||Y|
|Software drivers provided||N|
|Driver OS support||no driver required|
|IP-XACT Metadata included||N|
|Hardware validated||Y. Altera Board Name Customer board|
|Industry standard compliance testing performed||N|
|If No, is it planned?||N|
|IP has undergone interoperability testing||Y|
|Interoperability reports available||N|
Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.