Alizem DC Motor Control Embedded Software for Intel MAX10 FPGA

Block Diagram

Solution Type: IP Core, Qsys Component

End Market: Automotive, Consumer, Industrial, Medical, Military, Test & Measurement

Evaluation Method: OpenCore Plus, Source Code

Technology: Processors and Peripherals: Peripherals

MAX Series: MAX 10

Overview

Alizem DC Motor Control embedded software IP is meant to be easily, quickly and safely integrated into an Intel MAX10 FPGA for use in many applications: robotics, drones, medical devices, instrumentation and consumer products. It is perfect for multi-axis applications where many multiple software instantiations can be controlled from a single NIOS II processor with an easy to use API.

Features

    Device Utilization and Performance

    Each axis is taking under than 100LEs on MAX10 FPGA. Complete reference design (including NIOS II processor and UART) is under 2300 LEs, i.e. fits on the smallest MAX10 FPGAs.

    Getting Started

    1- Download datasheet for FREE on Alizem website: www.alizem.com/DCmotor 2- Choose version (demo, low-volume, IoT or open source) and download the software directly from the website. 3- At the same time, you can download Alizem ebooks on custom electric motor drive design and MAX10-based embedded system design.

    IP Quality Metrics

    Basic
    Year IP was first released2016
    Latest version of Quartus supported15.1
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerN
    Deliverables

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Y
    Parameterization GUI allowing end user to configure IPN
    IP core is enabled for OpenCore Plus SupportY
    Source language
    VHDL
    Testbench languageVHDL
    Software drivers providedY
    Driver OS supportAltera HAL
    Implementation
    User InterfaceAvalon-MM
    IP-XACT Metadata includedN
    Verification
    Simulators supportedModelSIm
    Hardware validated Y. Altera Board Name Altera MAX10 Development Kit
    Industry standard compliance testing performed
    N
    If No, is it planned?N
    Interoperability
    IP has undergone interoperability testing
    N
    Interoperability reports available  N

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