Embedded Motor Control Software IP for Servo-Drives Applications

Block Diagram

Solution Type: Qsys Component

End Market: Automotive, Consumer, Industrial, Medical, Military, Test & Measurement

Evaluation Method: OpenCore, OpenCore Plus

Technology: Processors and Peripherals: Peripherals

Cyclone Series: Cyclone IV, Cyclone V, Cyclone V SoC

MAX Series: MAX 10

Segments: 

Supported Device Family: 

Solution Type: 

Overview

Alizem Embedded Motor Control Software IP for Servo Drives applications is meant to be quickly, easily and safely integrated into Altera MAX10 FPGA-based motor drive systems. Its design is based on standard field-oriented (FOC) / vector motor control method with space vector PWM (SVPWM) and it can be used for torque, speed or position motor control applications.

Features

  • Easy to use: No need of advanced motor control nor FPGA expertise. Seamless integration with Alizem's proprietary API.
  • Multi-axis application ready by leveraging MAX10 FPGA multi-core capabilities. Great for robotics and drones !
  • Internet-of-things (IoT) ready with integrated Alizem IoT interface (optional).
  • High-Performance: Tested successfully on PMSM and BLDC motors from 30W to 100kW against leading motor drives on the market.

Device Utilization and Performance

Roughly 3k LES (FPGA) and 60kb of memory (NIOS II processor) per axis on MAX10 device.

Getting Started

1- Download datasheet and qualify for FREE demo on Alizem website. 2- Make sure to download Alizem FREE ebook on "How to design a custom electric motor drive using COTS components".

IP Quality Metrics

Basic
Year IP was first released2015
Latest version of Quartus supported15.1
Altera Customer Use
IP has been successfully implemented in production with at least one customerY
Deliverables

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim Altera edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file
Y
Parameterization GUI allowing end user to configure IPN
IP core is enabled for OpenCore Plus SupportY
Source language
VHDL
Testbench languageVHDL
Software drivers providedY
Driver OS supportBSP
Implementation
User InterfaceAvalon-MM
IP-XACT Metadata includedN
Verification
Simulators supportedModelsim
Hardware validated Y. Altera Board Name Altera MAX10 Development kit
Industry standard compliance testing performed
N
If No, is it planned?N
Interoperability
IP has undergone interoperability testing
Y
Interoperability reports available  N

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