System Diagram

Arria Series: Arria 10

Altera: Intellectual Property: Accelerator Function; Segment: Artificial Intelligence, Cybersecurity, Data Analytics, Financial, Genomics, Networking, Video


AES-GCM is an authenticated encryption algorithm designed to provide both authentication and privacy. The GCM is based on CTR Mode (Counter Mode) for encryption and a Galois field multiplication for authentication. The unique architecture of our AES-GCM Ip core enables very high throughput from 10 Gbps to 100 Gbps while maintaining an optimal resource usage. The scalability of the IP enables to find a trade-off between resources, performance and technology. The BA415 addresses a wide range of networking applications where security is a concern. The BA415 AES-GCM includes key management and context switching. The optimized context switching enables handling of multiple virtual streams of data within a single core. The key can be selected for each packet independently. The advanced pipelined architecture of the AES-GCM core enables small data packets to be processed without penalty on performance.


  • Unique balance between area and performances
  • Supports small packets (64 bytes) without performance penalty
  • Supports 128-bit and 256-bit key with integrated Key Expansion
  • Compliant with NIST SP800-38D
  • Low power features

Validated for use with

Quartus Prime Pro Version 17.0
Acceleration Stack version 1.0 Alpha
Xeon + FPGA Platforms supported Intel® Programmable Accelerator Card with Intel® Arria® 10 GX FPGA
Device Family Arria 10
Cloud Deployments undefined

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