VC-2 High Quality Video Decoder

Block Diagram

Solution Type: IP Core

End Market: Automotive, Broadcast, Industrial, Medical, Military

Evaluation Method: OpenCore, OpenCore Plus

Technology: DSP: Video and Image Processing

Arria Series: Arria 10, Arria V, Arria 10 SoC, Arria V SoC

Cyclone Series: Cyclone IV, Cyclone V, Cyclone V SoC

MAX Series: MAX 10, MAX V

Stratix Series: Stratix IV, Stratix V

Overview

The VC-2 High Quality Video Decoder is a light video compression IP core. The VC-2 HQ is ideally suited for ultra-low latency video transmission. The low complexity of the algorithm allows cost-effective compression of the video stream. A typical use case of the VC-2 HQ is the reduction of the bandwidth required to transport HD, 4K and high frame rate video signals.

Features

    Device Utilization and Performance

    The VC-2 HQ decoder is scalable. Please contact Barco Silex to receive accurate estimation based on your application requirements and FPGA device.

    Getting Started

    Please contact Barco Silex to evaluate the VC-2 HQ IP cores and receive additional information.

    IP Quality Metrics

    Basic
    Year IP was first released2016
    Latest version of Quartus supported15.1
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerY
    Deliverables

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Y
    Any additional customer deliverables provided with IP
    Bit-accurate software model of the VC-2 encoder
    Parameterization GUI allowing end user to configure IPN
    IP core is enabled for OpenCore Plus SupportY
    Source language
    VHDL
    Testbench languageVHDL
    Software drivers providedN
    Driver OS support-
    Implementation
    User InterfaceAXI
    IP-XACT Metadata includedN
    Verification
    Simulators supportedMentor Graphics, Synopsys and Cadence
    Hardware validated N. Altera Board Name DK-DEV-4SGX230N
    Industry standard compliance testing performed
    N
    If No, is it planned?N
    Interoperability
    IP has undergone interoperability testing
    N
    Interoperability reports available  N

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