The GZIP-RD-A10 is a data compression acceleration function. It uses the ZipAccel-C GZIP/ZLIB/Deflate Compression IP Core and has been designed with QuickPlay® in partnership with Accelize®. The accelerator function is highly efficient and can compress data at rates exceeding 40 Gbps, making it suitable for servers or databases where it optimizes storage requirements or network bandwidth. The GZIP-RD-A10 is available as a ‘drop-in’ accelerator function for the Intel® Programmable Acceleration Card (Intel PAC) as well as other PCIe boards hosting an Arria 10 FPGA. It is delivered with a sample GUI-driven application, and is compatible with Intel Acceleration Stack for Intel Xeon CPU with FPGAs, easing the use of FPGA acceleration in Xeon-based systems. The GZIP-RD-A10 accelerator function can be made available for Cloud FPGA instances using Accelize’s QuickStore.
Validated for use with
Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.