DVB-CID Modulator

Block Diagram

Solution Type: IP Core

End Market: Broadcast, Military, Test & Measurement, Wireless, Wireline

Evaluation Method: OpenCore Plus

Technology: DSP: Error Detection and Correction

Arria Series: Arria 10, Arria V, Arria 10 SoC, Arria V SoC

Cyclone Series: Cyclone IV, Cyclone V, Cyclone V SoC

Stratix Series: Stratix IV, Stratix V

Segments: 

Supported Device Family: 

Solution Type: 

Overview

DVB-CID (Digital Video Broadcast - Carrier Identification System) is an ETSI standard for interference prevention within digital data transmission via satellites that was first published in 2013. Its goal is the identification of interfer- ing transmissions from other sources, in order to respond to Radio Frequency Interference (RFI). The Creonic DVB-CID high performance modulator can be configured by a simple configuration interface and outputs a baseband signal split into real and imaginary part.

Features

    Device Utilization and Performance

    -baseband output with real and imaginary part

    Getting Started

    Please contact the Creonic Sales Team!

    IP Quality Metrics

    Basic
    Year IP was first released2015
    Latest version of Quartus supported15.1
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerY
    Deliverables

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Y
    Any additional customer deliverables provided with IP
    no
    Parameterization GUI allowing end user to configure IPN
    IP core is enabled for OpenCore Plus SupportY
    Source language
    VHDL
    Testbench languageVHDL
    Software drivers providedN
    Driver OS supportn/a
    Implementation
    User InterfaceOther: proprietary
    IP-XACT Metadata includedN
    Verification
    Simulators supportedModelSim, RivieraPRO
    Hardware validated N. Altera Board Name DE1, DE2
    Industry standard compliance testing performed
    N
    If No, is it planned?Y
    Interoperability
    IP has undergone interoperability testing
    N
    Interoperability reports available  N

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