DVB-S2X Wideband Modulator IP

Block Diagram

Solution Type: IP Core

End Market: Broadcast, Military, Test & Measurement, Wireless, Wireline

Evaluation Method: OpenCore Plus

Technology: DSP: Error Detection and Correction

Arria Series: Arria 10, Arria V, Arria 10 SoC, Arria V SoC

Cyclone Series: Cyclone IV, Cyclone V, Cyclone V SoC

Stratix Series: Stratix IV, Stratix V

Segments: 

Supported Device Family: 

Solution Type: 

Overview

The Creonic DVB-S2X high performance wideband modulator performs all tasks of an inner transmitter. The modulator expects BBFrames after mode adaptation as input and performs stream adaptation, FEC encoding, mapping, PL framing and modulation. In addition the core can perform baseband interpolation and output gain adjustment. The output of the core is designed to be followed by a DAC and RF front end.

Features

  • Compliant with DVB-S2 and DVB-S2X
  • Supports ACM, CCM and VCM modes
  • Support for short and normal frames (16200 bits and 64800 bits)
  • Support for QPSK to 256 APSK, VLSNR modes upon request

Device Utilization and Performance

Symbol rate of up to 500 MSymb/s even for 256-APSK

Getting Started

Contact us at Sales@creonic.com to request more information about our IP Cores.

IP Quality Metrics

Basic
Year IP was first released2016
Latest version of Quartus supported17.0
Altera Customer Use
IP has been successfully implemented in production with at least one customerY
Deliverables

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim Altera edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file
Y
Any additional customer deliverables provided with IP
No
Parameterization GUI allowing end user to configure IPN
IP core is enabled for OpenCore Plus SupportY
Source language
Verilog; VHDL
Testbench languageVHDL
Software drivers providedY
Driver OS supportn/a
Implementation
User InterfaceAXI
IP-XACT Metadata includedN
Verification
Simulators supportedModelSim, RivieraPRO
Hardware validated N. Altera Board Name NULL
Industry standard compliance testing performed
N
If No, is it planned?Y
Interoperability
IP has undergone interoperability testing
N
Interoperability reports available  N

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