Viterbi Decoder

Block Diagram

Solution Type: IP Core

End Market: Broadcast, Military, Test & Measurement, Wireless, Wireline

Evaluation Method: OpenCore Plus

Technology: DSP: Error Detection and Correction

Arria Series: Arria 10, Arria V, Arria 10 SoC, Arria V SoC

Cyclone Series: Cyclone IV, Cyclone V, Cyclone V SoC

Stratix Series: Stratix IV, Stratix V

Overview

Convolutional codes are widely adopted in wireless communication systems for forward error correction. Creonic offers you an open source Viterbi decoder with AXI4-Stream interface, that is capable of decoding most of the convolutional codes as defined by various standards

Features

    Device Utilization and Performance

    FPGA: ep4cgx30cf23c6 MAX_WINDOW_LENGTH /BW_LLR_INPUT : 96 / 4 Constraint length / DISTRIBUTED_RAM: 7 / false LE: 4124 FFs: 2012 BRAMs M9K: 8 Frequency (MHz): 192

    Getting Started

    Please contact the Creonic Sales Team!

    IP Quality Metrics

    Basic
    Year IP was first released2012
    Latest version of Quartus supported15.1
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerY
    Deliverables

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Y
    Any additional customer deliverables provided with IP
    no
    Parameterization GUI allowing end user to configure IPN
    IP core is enabled for OpenCore Plus SupportY
    Source language
    VHDL
    Testbench languageVHDL
    Software drivers providedN
    Driver OS supportn/a
    Implementation
    User InterfaceAXI
    IP-XACT Metadata includedN
    Verification
    Simulators supportedModelSim, RivieraPRO
    Hardware validated N. Altera Board Name Arria V GX, Stratix V GX, Cyclone V SX SoC, Arria V ST SoC, Stratix IV GX
    Industry standard compliance testing performed
    N
    If No, is it planned?Y
    Interoperability
    IP has undergone interoperability testing
    N
    Interoperability reports available  N

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