NVMe IP core

Block Diagram

Solution Type: IP Core

End Market: Broadcast, Computer & Storage, Industrial, Medical, Military, Test & Measurement

Evaluation Method: Source Code

Technology: Interface Protocols: PCI Express

Arria Series: Arria 10, Arria V, Arria 10 SoC

Cyclone Series: Cyclone V, Cyclone V SoC


NVMe IP core interfaces Ultra high-speed PCIe SSD without CPU and external memory. The performance of the latest version drastically improves with built-in optimized PCIe bridge. It achieves over 3300MB/s (read) and over 2100MB/s (Write) ultra high-speed transfer.The new NVMe IP core is very low FPGA resource (reducing more than 50%).This is also lead to less power consumption. It is the best solution for applications which require ultra high-speed performance with compact system. For more information go to: http://www.dgway.com/NVMe-IP_A_E.html


    Device Utilization and Performance

    Read speed:Over 3300MB/sec, Write speed: Over 2100MB/sec. Very low FPGA resource: Less than 1200 ALMs. // Arria10 SX (10AS066N3F40E2SGE2) Fmax= 280 MHz, Logic utilization=1144 ALMs, Block Memory bit=2,162,688

    Getting Started

    1st Step: Download free evaluation sof file from DesignGateway official website / 2nd Step: Adapter board is provided from DesignGateway / 3rd Step: Evaluate the IP core performance / 4th Step: Purchasing IP core / http://www.dgway.com/NVMe-IP_A_E.html

    IP Quality Metrics

    Year IP was first released2016
    Latest version of Quartus supported16.0
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerY

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Any additional customer deliverables provided with IP
    Reference Design
    Parameterization GUI allowing end user to configure IPN
    IP core is enabled for OpenCore Plus SupportN
    Source language
    Testbench languageVHDL
    Software drivers providedN
    Driver OS supportN/A
    User InterfaceOther: Customized
    IP-XACT Metadata includedN
    Simulators supportedModelsim Altera Edition
    Hardware validated Y. Altera Board Name Arria V GX, Arria 10 GX, Arria 10 SX
    Industry standard compliance testing performed
    If No, is it planned?N
    IP has undergone interoperability testing
    Interoperability reports available  N

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