Mini PCIE Fpga Card with 53 I/O and EP4CGX15 Fpga

Board Image

Block Diagram

Board Category: Daughter Card

Components & Interface: Expansion: Generic; Industry Standard: PCIE Edge

End Market: Computer & Storage, Industrial, Medical, Test & Measurement

Technology: Embedded Design, Interface Protocols

Board Feature: General User IO: LED

Cyclone Series: Cyclone IV: Cyclone IV GX

Overview

The mini PCIe FPGA board make easy to add in an embedded PC a powerfull I/O capability. It make able your SBC to interface many applications where customized interfaces are needed, such as in Electromedical, Industrial and Test equipments. Using the Altera PCIe IP and SGDMA you'll able able to perform continous DMA data up to 165Mbytes/sec (Half duplex) or 253Mbytes/Sec (Full Duplex). You can build a system by yourself .. you also use one of the systems available can be downloaded from the GEB Enteprise web site: See at www.geb-enterprise.com/Products/PCIe_FPGA_Systems.html .. or you can customize by your self one system template by the Fpga Easy Web Editor See at http://www.geb-enterprise.com/Products/Fpga_System_Edit_and_Configure.html

Order Information

Ordering Code
Pricing
Buy
100801A2$318Buy Now

Development Kit Hardware Contents

  • -100801A2 Mini Pci board

Development Kit Software Contents

  • -Demo program under

Support Document

File Name
Description
Version
doc-us-dsnbk-112-0108320108785-100801um-rev-b-pciem-15-io.pdfPCIem-15-IO USER’S MANUAL1.1

Board Quality Metrics

Basic
Latest version of Quartus supported 15.1
Required Collateral Available
User Guide Y
Board Schematics N
Reliability / Quality Assurance

Defects per Million Opportunities (DPMO)

N/A
Parts per Million (PPM)
N/A
Board Policy
Return Material Authorization (RMA) Policy Units older than 10 years are considered no more repairable. Units under warranty are repaired without charges unless hardware fault is due to manumission or external causes.
Compliance
RoHS Compliant Y
CE Compliant Y. CE Industrial
Conflict Mineral Policy Compliant
Y
Test Plan Summary

-Boundary Scan Test of all interconnections, including PCIE lanes \n-Dynamic Functional Tests with PIO FPGA system on Advantech MIO-5250

Additional Compliance
ISO 9000 & 9001

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.