pSoc-M10

Board Image

Block Diagram

Board Category: Production Ready Board, Development Kit

Components & Interface: Expansion: Generic; Industry Standard: RS232

End Market: Industrial, Medical, Test & Measurement

Technology: Embedded Design, General Purpose, Interface Protocols

Board Feature: General User IO: LED, Push Button

MAX Series: MAX 10: MAX 10 SA

Overview

Typical applications of this pico-SOC are in the “Smart Core” of smal smart subsystem that operate in “Bar Metal mode”, without Operative System, such as Motors, sensors position, graphic leds matrix, communication controller in digital, analog and power signals, management of setup parameters, command, status and faults. It contains everything you need to start using the advanced features of Altera MAX10 family features. The baseboard version sockets a 10M08SAE144C8G device in a TQFP144 package, allowing hosting of others MAX10 devices up to 10M50SAE144C8G, the biggest one.

Order Information

Ordering Code
Pricing
Buy
180199K1$600Buy Now

Development Kit Hardware Contents

  • 171017A1, the pico-SOC board, equipped with FPGA 10M08SAE144C8
  • 171122A1, the pico SOC Carrier board, that hosts 2XRS232, 2XUSB, 2x32Ways 2.54mm pitch headers
  • USB Blaster

Development Kit Software Contents

  • CD with Fpga example system and related example programs

Support Document

File Name
Description
Version
doc-us-dsnbk-112-3402001201418-171122um-rev-a-mb-psoc-m10.pdfMax10 Psoc User Manual0.0

Board Quality Metrics

Basic
Latest version of Quartus supported 17.0
Required Collateral Available
User Guide Y
Board Schematics N
Reliability / Quality Assurance

Defects per Million Opportunities (DPMO)

N/A
Parts per Million (PPM)
N/A
Board Policy
Return Material Authorization (RMA) Policy Units older than 10 years are considered no more repairable. Units under warranty are repaired without charges unless hardware fault is due to manumission or external causes.
Compliance
RoHS Compliant Y
CE Compliant Y. Y. 2011/65/ec
Conflict Mineral Policy Compliant
Y
Test Plan Summary

-Boundary Scan Test of all interconnections, including I/O connectors. Dynamic Functional Tests with one NIOS FPGA loading an example system.

Additional Compliance
ISO 9000 & 9001

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.