Supported Device Family:
The IntelliProp IPC-BL120A-ZM is an AES-XTS Encryption Core supporting 128 or 256 bit encryption. The IPC-BL120A-ZM provides encryption/decryption based on a design principle known as substitution-permutation network (SP-network). An SP-network takes a block of the plaintext (clear data or non-encrypted data) and the key as inputs, and applies several alternating “rounds” or “layers” of substitution boxes and permutation boxes to produce the ciphertext (encrypted data). The IPC-BL120A-ZM is fully verified in pseudo random simulation. Applications include: high throughput data paths requiring encryption; applications requiring high levels of encryption; applications requiring FIPS-197 certified encryption/decryption algorithms.
- 128 or 256 bit selectable AES encryption
- The AES-XTS algorithm is FIPS-197 certified, cert. no 2408
- The encode and decode channels are made to look and act like independent FIFOs for ease of integration.
- Programmable number of pipeline paths allows the user to balance area/bandwidth requirements.
- Independent Cipher/Inverse Cipher key management
IP Quality Metrics
|Year IP was first released||2013|
|Latest version of Quartus supported||16.1|
|Altera Customer Use|
|IP has been successfully implemented in production with at least one customer||Y|
Customer deliverables include the following:
|Any additional customer deliverables provided with IP||Simulation Script, Sample Vectors|
|Parameterization GUI allowing end user to configure IP||Y|
|IP core is enabled for OpenCore Plus Support||N|
|Software drivers provided||N|
|Driver OS support||n/a|
|IP-XACT Metadata included||N|
|Hardware validated||N. Altera Board Name Cyclone V,|
|Industry standard compliance testing performed||N|
|If No, is it planned?||N|
|IP has undergone interoperability testing||N|
|Interoperability reports available||N|
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