Color Space Conversion

Block Diagram

Solution Type: IP Core

End Market: Automotive, Broadcast, Computer & Storage, Consumer, Industrial, Medical, Military, Test & Measurement, Wireless, Wireline

Evaluation Method: OpenCore Plus

Technology: DSP: Video and Image Processing

Arria Series: Arria 10, Arria V, Arria 10 SoC, Arria V SoC

Cyclone Series: Cyclone IV, Cyclone V, Cyclone V SoC

Stratix Series: Stratix IV, Stratix V

Segments: 

Supported Device Family: 

Solution Type: 

Overview

Color Space Converter converts video data from one color space format to another format. It is necessary to transfer data between devices which used different color space.

Features

  • Supports the following Color Space Converter Core: YCbCr to RGB & YUV to RGB
  • Format: 4:4:4 & 3 color plane in parallel processing
  • Image size resolution can be from QCIF to Full HD
  • Coefficients are software programmable & 8-bit per pixel per color
  • Pipelined multiplier & Latency of 4 clocks

Device Utilization and Performance

Altera Cyclone IV E Logic Element combinational - 234 Logic Element Registers - 48 Embedded Multipliers 9 bit Elements - 18

Getting Started

1. Simple design makes it easier to integrate in many FPGA families. 2. Core does color space conversion with latency of 4 clocks

IP Quality Metrics

Basic
Year IP was first released2011
Latest version of Quartus supported15.1
Altera Customer Use
IP has been successfully implemented in production with at least one customerY
Deliverables

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim Altera edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file
Y
Parameterization GUI allowing end user to configure IPY
IP core is enabled for OpenCore Plus SupportY
Source language
Verilog
Testbench languageVerilog
Software drivers providedN
Driver OS supportLINUX
Implementation
User InterfaceAvalon-MM
IP-XACT Metadata includedN
Verification
Simulators supportedModelSim DE 10.2
Hardware validated Y. Altera Board Name Stratix IV GX
Industry standard compliance testing performed
N
If No, is it planned?Y
Interoperability
IP has undergone interoperability testing
N
Interoperability reports available  N

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