GiGE / Triple-speed Ethernet MAC 8-bit core with GMII/RGMII/SGMII interface @ 125MHz/12.5MHz/1.25MHz Solution

Block Diagram

Solution Type: IP Core

End Market: Automotive, Broadcast, Computer & Storage, Consumer, Industrial, Medical, Military, Test & Measurement, Wireless, Wireline

Evaluation Method: Source Code

Technology: Interface Protocols: Ethernet

Arria Series: Arria 10

Stratix Series: Stratix V

Segments: 

Supported Device Family: 

Solution Type: 

Overview

The GiGE/Triple-speed Ethernet MAC offers an IEEE802.3-2015 compliant solution that meets the requirements for GiGE/tri-mode LAN in NIC (Network Interface Card) applications.

Features

  • AXI4-Streaming or Avalon-Streaming, FIFO based user side interface
  • Supports only 1000Mbps speed with GMII/RGMII PCS side interface
  • Supports 10/100/1000Mbps speed in SGMII mode with PCS/PMA IP Cores from Intel
  • Statistics counter block (for RMON and MIB)
  • MDIO cores for external PHY status/control

Device Utilization and Performance

See datasheet

Getting Started

A complete reference design using a simple L2 (MAC level) packet generator/checker is also included to facilitate quick integration of the Ethernet MAC in a user design.

IP Quality Metrics

Basic
Year IP was first released2010
Latest version of Quartus supported16.1
Altera Customer Use
IP has been successfully implemented in production with at least one customerY
Deliverables

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim Altera edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file
Y
Any additional customer deliverables provided with IP
See datasheet
Parameterization GUI allowing end user to configure IPN
IP core is enabled for OpenCore Plus SupportY
Source language
Verilog
Testbench languageVerilog
Software drivers providedY
Driver OS supportLinux
Implementation
User InterfaceAXI; Avalon-MM
IP-XACT Metadata includedN
Verification
Simulators supportedModelSim
Hardware validated Y. Altera Board Name Custom Arria 10 and Stratix V boards
Industry standard compliance testing performed
N
If No, is it planned?N
Interoperability
IP has undergone interoperability testing
Y
Interoperability reports available  Y

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