XpressRICH3-AXI

Block Diagram

Solution Type: IP Core

End Market: Automotive, Broadcast, Computer & Storage, Consumer, Industrial, Medical, Military, Test & Measurement, Wireless

Evaluation Method: Source Code

Technology: Interface Protocols: PCI Express

Arria Series: Arria 10, Arria V

Stratix Series: Stratix V

Overview

XpressRICH3-AXI is an enterprise class PCIe interface Soft IP with configurable AMBA AXI3/AXI4 user interfaces and high-performance DMAs, address translation, ordering rules observance, ECAM, data protection (ECC, ECRC). With SR-IOV, 6 BARs+ EPROM and Open interrupt interface supports, it enables NVM Express and SATA Express implementation. Benefiting from a close collaboration with ARM®, XpressRICH3-AXI is the most advanced PCIe interfacing solution for ARM embedded processors, featuring a unique architecture and features specifically engineered for AMBA AXI based System-on-Chip.

Features

    Device Utilization and Performance

    Contact us to know device utilization and performance for your configuration

    Getting Started

    Available

    IP Quality Metrics

    Basic
    Year IP was first released2012
    Latest version of Quartus supported15.1
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerY
    Deliverables

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Y
    Parameterization GUI allowing end user to configure IPY
    IP core is enabled for OpenCore Plus SupportN
    Source language
    Verilog
    Testbench languageVerilog
    Software drivers providedY
    Driver OS supportLinux , Windows
    Implementation
    User InterfaceAXI
    IP-XACT Metadata includedN
    Verification
    Simulators supportedPLDA
    Hardware validated Y. Altera Board Name XpressGX5LP
    Industry standard compliance testing performed
    Y
    If yes, which test(s)?PCI-SIG
    If yes, on which Altera device(s)?STRATIX V
    If Yes, date performed
    01/27/2014
    Interoperability
    IP has undergone interoperability testing
    Y
    Interoperability reports available  Y

    Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.