iPORT NTx-U3 Intellectual Property

Block Diagram

Solution Type: IP Core

End Market: Industrial, Medical, Military, Test & Measurement, Wireline

Evaluation Method: OpenCore

Technology: DSP: Video and Image Processing

Cyclone Series: Cyclone V

Overview

Pleora's iPORT NTx-U3 Intellectual Property (IP) is a package of tools, reference designs, and expert design services that allows system and camera manufacturers to fully integrate USB3 Vision connectivity in imaging devices. The iPORT NTx-U3 IP Core Package allows manufacturers to reduce overall system costs by creating Altera Cyclone V FPGA loads which fully integrate their logic with Pleora's iPORT NTx-U3 IP core. This FPGA load can be paired with custom hardware developed with the iPORT NTx-U3 Hardware Reference Design. Pleora's IP core platform increases flexibility and reduces costs for manufacturers by providing a straightforward design path to integrate their logic with the iPORT NTx-U3 IP Core in a custom FPGA load. Designers can utilize a single FPGA to perform pixel correction, color space conversion, and other specialized analysis tasks as well as incorporating USB3 Vision functionality.

Features

    Device Utilization and Performance

    Altera Cyclone V, pixel bus to USB3 load provided by Pleora, user defined to USB3 Vision load created by customer based on the Pleora IP Core Package, Backup and main loads provided by Pleora, FPGA load licensable with iPORT Authorizer

    Getting Started

    The iPORT NTx-U3 Hardware Reference Design allows manufacturers to develop customized hardware based on the design of Pleora's iPORT NTx-U3 Embedded Video Interface hardware. The customized hardware can be paired with Pleora's off-the-shelf FPGA load, or with a customized FPGA load created with the iPORT NTx-U3 IP Core Package.

    IP Quality Metrics

    Basic
    Year IP was first released2013
    Latest version of Quartus supported14.0
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerN
    Deliverables

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Y
    Parameterization GUI allowing end user to configure IPN
    IP core is enabled for OpenCore Plus SupportN
    Source language
    VHDL
    Testbench languageVHDL
    Software drivers providedY
    Driver OS supporteBUS SDK
    Implementation
    User InterfaceAvalon-MM
    IP-XACT Metadata includedN
    Verification
    Simulators supportedModelSim
    Hardware validated N. Altera Board Name Enclustra Mars AX3
    Industry standard compliance testing performed
    N
    If No, is it planned?N
    Interoperability
    IP has undergone interoperability testing
    N
    Interoperability reports available  N

    Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.