Arria 10 FPGA FMC Attila Instant-Development Kit

From ReFLEX CES

Board Image

Block Diagram

Board Category: COTS, Development Kit

Components & Interface: Expansion: FMC; Industry Standard: Ethernet, PCIE Edge; Video: DVI Input

End Market: Automotive, Broadcast, Computer & Storage, Industrial, Medical, Military, Wireless, Wireline

Technology: ASIC Prototyping, Embedded Design, General Purpose, Interface Protocols

Arria Series: Arria 10: Arria 10 GX

Overview

Designing for high performance serial transceiver applications using series 10 ALTERA FPGAs / Arria 10 GX 1150 KLEs. Hardware, software design tools, IP, and pre-verified reference designs Loopback boards, cables, and extension IOs board are available in the kit content PCIe with 8 lanes at 8 Gb/s link rate (Gen3) Advanced memory interface with DDR4 SODIMM Memory up to 16 GB, support ECC and Non ECC Enabling serial connectivity with QSFP+ with 4 XCVR links: 12.5 Gb/s per link* Develop networking applications with RJ45 copper connector 10/100/1000 Base-T Ethernet (Through RGMII PHY​) Implement Video display applications with Display output port Rev 1.2 (up to 5.4Gbit/s) Expand I/O connector with 2 connectors in order to improve a front end of 32 high speed link. On board programmable PLL oscillator (Si5341), highly flexible and configurable clock generator/buffer. The board respect the VITA57.1 standard, you can plug FPGA Mezzanine Card (FMC) on the front end The FMC interface provides High Pin Count (HPC) fully populated, compliant +1.8V only (+vadj) •160 LVCMOS (1.8V) usable as 80 LVDS (1.8V, 2.5V) •4 dedicated LDVS clocks that respect the VITA57.1 pinout assignment usable as LVDS signals or 8 LVCMOS •10 XCVR (up to: 12.5 Gb/s)* * Production Device with transceiver speed grade 4 can reach 12.5 Gb/s chip to chip links, The VITA 57.1 standard allows interfaces up to 10 Gb/s

Order Information

Ordering Code
Pricing
Buy
RXCA10X115PF40-IDK00A$3995Buy Now

Development Kit Hardware Contents

  • Power Supply with international cables
  • Set of loopback card (FMC, PCie) and LCD (2 lines x 16 characters)
  • Bundle of cables (DisplayPort, Ethernet, USB, SMA, ...)
  • One 4GB sodimm module , x64 (Non ECC), single Rank, 2133 MT/s
  • Documentation : Starter Guide, Reference manual, Schematics, Layout files

Development Kit Software Contents

  • ReFLEX innovative software interface (GUI on Windows)
  • USB key contains documentation (Starter Guide, Reference Manual, Schematics, Assembly files and Productbrief of the Kit)
  • USB key contains all the example test designs delivered with the DevKit, complete quartus project and source files
  • OpenCL BSP HPC // RXCA10X0000F40-BSP00B

Support Document

File Name
Description
Version
Flyer Attila Arria 10 GX1us

Board Quality Metrics

Basic
Latest version of Quartus supported 15.1
Required Collateral Available
User Guide Y
Board Schematics Y
Reliability / Quality Assurance

Defects per Million Opportunities (DPMO)

0
Parts per Million (PPM)
0
Board Policy
Return Material Authorization (RMA) Policy Available on request through REFLEX CES support web site.
Compliance
RoHS Compliant Y
CE Compliant Y. On request
Conflict Mineral Policy Compliant
Y
Test Plan Summary

When using the ARRIA 10 FPGA FMC IDK for the first time the user can launch the innovative Graphical User Interface and discover the Kit interfaces, applications and performances. The USB key also contains all the files required to enable test interfaces or help the user to start his own design. We provide the user an ATTILA Top_Arria10 folder which contains a blank Quartus II project intended for building a custom design "from scratch".

Additional Compliance
ISO 9000 & 9001

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.