5 Mega Pixel Digital Camera Package

From Terasic Inc.

Board Image

Block Diagram

Board Category: Daughter Card

Components & Interface: Expansion: Generic; Video: Camera, DVI Input

End Market: Automotive, Broadcast, Computer & Storage, Consumer, Industrial, Medical, Military, Wireline

Technology: General Purpose

Board Feature: General User IO: LED

Arria Series: Arria II: Arria II GX; Arria V: Arria V GT, Arria V GX

Cyclone Series: Cyclone II, Cyclone III; Cyclone IV: Cyclone IV E, Cyclone IV GX; Cyclone V: Cyclone V E, Cyclone V GT, Cyclone V GX; Cyclone V SoC: Cyclone V SE, Cyclone V SX

MAX Series: MAX 10: MAX 10 DA

Stratix Series: Stratix IV: Stratix IV GX; Stratix V: Stratix V GS, Stratix V GX


The 5 Mega Pixel Digital Camera Development Package provides everything you need to develop a 5 Mega Pixel Digital Camera on the Terasic FPGA system board. The kit contains hardware design (in Verilog) and software to load the picture taken into the PC and save it as BMP/JPG file. The Getting Started User Guide shows users how to exercise the digital camera functions.

Order Information

Ordering Code
P0001$80Buy Now

Development Kit Hardware Contents

  • Support exposure time controlling-Users can adjust the exposure according to the light of the surrounding area
  • Support motion capture mode; Software allows users to upload the picture captured into PC & save the picture into bitmap or JPEG for viewing
  • Equipped with Micron 5 Mega Pixel CMOS sensor; Support 2592H x 1944V active pixels; Output data in RGB Bayer Pattern format
  • Full resolution frame rate up to 15 frame per second (FPS); Programmable controls: gain, frame rate, frame size, exposure; On-chip PLL
  • Global reset release; Bulb exposure mode; Snapshot mode to take frames on demand; Horizontal and vertical mirror image; Auto black level calibration

Development Kit Software Contents

  • Complete reference design with source code in Verilog
  • Digital camera design demonstration

Support Document

File Name
doc-us-dsnbk-42-2608010102169-thdb-hdmi-userguide1-3.pdfD5M User Manual1.2

Board Quality Metrics

Latest version of Quartus supported 13.0
Required Collateral Available
User Guide Y
Board Schematics Y
Reliability / Quality Assurance

Defects per Million Opportunities (DPMO)

Parts per Million (PPM)
Board Policy
Return Material Authorization (RMA) Policy If you want to make a return, please write an email to us within 7 days after you’ve received the product. The product must be unopened. (If the package is damaged upon receipt, please take photos and inform us immediately.) For more details, please visit: RMA.Terasic.com
RoHS Compliant Y
CE Compliant N. N/A
Conflict Mineral Policy Compliant
Test Plan Summary

Reference Designs from System CD for customers to access all the peripherals on board.

Additional Compliance
ISO 9000 & 9001

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.