Terasic Stratix 10 DE10-Pro FPGA Development Kit

From Terasic Inc.

Board Image

Block Diagram

Board Category: COTS, Development Kit

Components & Interface: Industry Standard: Ethernet, PCIE Edge, RS232

End Market: Broadcast, Computer & Storage, Industrial, Medical, Military, Test & Measurement, Wireline

Technology: ASIC Prototyping, DSP, Embedded Design, General Purpose, Interface Protocols

Board Feature: General User IO: LED

Stratix Series: Stratix 10: Stratix 10 GX


Terasic DE10-Pro Stratix 10 GX FPGA Development Kit provides the ideal hardware solution for designs that demand high capacity and bandwidth memory interfacing, ultra-low latency communication, and power efficiency. With a full-height, 3/4-length form-factor package, the DE10-Pro is designed for the most demanding high-end applications, empowered with the top-of-the-line Intel Stratix 10 GX, delivering the best system-level integration and flexibility in the industry. The Stratix 10 GX FPGA features integrated transceivers that transfer at a maximum of 28 Gbps, allowing the DE10-Pro to be fully compliant with version 3.0 of the PCI Express standard, as well as allowing an ultra low-latency, straight connections to four external 100G QSFP28 modules. Not relying on an external PHY will accelerate mainstream development of network applications enabling customers to deploy designs for a broad range of high-speed connectivity applications. For designs that demand high capacity and high speed for memory and storage, the DE10-Pro provides 4 independent banks of DDR4 SO-DIMM RAM modules and high-speed parallel flash memory. (The sockets can work with Terasic's QDRII or QDR-IV memory modules). The feature-set of the DE10-Pro fully supports all high-intensity applications such as low-latency trading, cloud computing, high-performance computing, data acquisition, network processing, and signal processing.

Order Information

Ordering Code
P0300$Contact UsBuy Now

Development Kit Hardware Contents

  • FPGA Fabric Speed Grade: -2/ Transceiver Speed Grade : -1; Full-height, 3/4-length form-factor package
  • Ultra-low-latency, straight connections to 4 external 100G QSFP28 modules
  • 4 independent banks of DDR4 SO-DIMM sockets with ECC, up to 8 GB 1200MHz for each socket. (Can be paired flexibly with Terasic’s 576-Mbit QDR-II+ or 1
  • High-speed parallel flash memory; PCIe Gen3x16 (includes PCIe drivers); Support Intel FPGA OpenCL BSP; 2x5 Timing Expansion Header for 1PPS
  • On-board USB Blaster II or JTAG header for FPGA programming

Development Kit Software Contents

  • DE10-Pro Net System Builder
  • BSP (Board Support Package) for Intel SDK OpenCL
  • Schematic and mechanical drawing
  • Memory & PCIe reference design
  • Flash and oscillator programming

Support Document

File Name
doc-us-dsnbk-42-3703551010380-de10-pro-user-manual.pdfDE10-Pro User Manual1.0

Board Quality Metrics

Latest version of Quartus supported 17.0
Required Collateral Available
User Guide Y
Board Schematics Y
Reliability / Quality Assurance

Defects per Million Opportunities (DPMO)

Parts per Million (PPM)
Board Policy
Return Material Authorization (RMA) Policy If you want to make a return, please write an email to us within 7 days after you’ve received the product. The product must be unopened. (If the package is damaged upon receipt, please take photos and inform us immediately.) For more details, please visit: RMA.Terasic.com
RoHS Compliant Y
CE Compliant N. N/A
Conflict Mineral Policy Compliant
Test Plan Summary

Reference Designs from System CD for customers to access all the peripherals on board.

Additional Compliance
ISO 9000 & 9001

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.