Heterogeneous 3D System-in-Package Integration

Intel®'s heterogeneous 3D SiP strategy enables a scalable device family with tremendous flexibiliy to implement a wide-range of heterogeneously integrated, high performance solutions.  In addition,  preserving a monolithic core fabric allows us to have the fastest timing closure up to 1 GHz and the highest level of designer productivity to meet next generation system requirements.

New products use innovative Embedded Multi-Die Interconnect Bridge (EMIB) Packaging Technology for heterogenous integration of analog, memory, CPU, asic  tiles alongside a monolthic FPGA fabric.

Intel's FPGA SiP technology is designed to deliver multiple product variants that mix functionality and/or process nodes effectively within a single package. These new product classes will meet the system functionality requirements of today and those of the future, including:

  • Higher Performance / Bandwidth
    System-In-Package integration using EMIB, enables the highest interconnect density between FPGA and the companion die.  This results in high bandwidth connectivity between the SiP components.  In addition, user signals communicating to external world use standard FCBGA traces, thereby improving signal and power integrity.
  • Lower Power
    Companion die (such as memory etc) are placed as close as possible to FPGA. The interconnect traces between the FPGA and the companion die are thus very short and don’t need as much power to drive them. This results in lower power overall and the most optimum performance/watt metric.
  • Smaller Form Factor
    The ability to heterogeneously integrate components in a single package results in smaller form factors. This helps customers save valuable board space, reduce board layers and overall build of material (BOM) cost.
  • Greater Flexibility, Scalability and Ease of Use
    SiP helps reduce routing complexity at the PCB level since the components are already integrated within the package. In addition, SiP enhances the ability to incorporate different die geometries, silicon technologies. Net result is a highly flexible, scalable solution that is easy to use.
  • Faster Time to Market
    SiP enables faster time to market by being able to integrate already proven technology and reuse common devices or tiles across product variants. This saves valuable time and resources, thereby helping customers accelerate their time to market.  

Learn More about Heterogeneous 3D SiP Integration

Download this white paper to learn more about how Stratix® 10 FPGAs and SoCs leverage heterogeneous 3D SiP integration to deliver performance, power, and form factor breakthroughs while providing greater scalability and flexibility. In addition, learn how Intel EMIB technology delivers a superior solution for multi-die integration.

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Advantages of Monolithic FPGA Fabric

Monolithic FPGA fabrics (heterogeneous integration) offer significant advantages over FPGA fabrics that are stitched together in a multi-die package (homogeneous integration). The advantages include faster time-to-market, higher performance, and lower cost. Download this white paper to learn about the advantages of monolithic FPGA fabrics, and the pitfalls of designing with FPGAs built with homogeneous integration technology.

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